From bfcb6e518371bb943b77e0ef784e1de72a99aec6 Mon Sep 17 00:00:00 2001 From: Juzhe-Zhong <juzhe.zhong@rivai.ai> Date: Tue, 14 Nov 2023 11:21:16 +0800 Subject: [PATCH] RISC-V: Fix init-2.c assembly check Notice the assembly check of init-2.c is wrong. Committed. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/init-2.c: Fix vid.v check. --- gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c index f27c395441b2..ae31e227ad1d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c @@ -45,4 +45,4 @@ DEF_INIT (v128uhi, uint16_t, 128, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127) -/* { dg-final { scan-assembler-times {vid\.vx} 494 } } */ +/* { dg-final { scan-assembler-times {vid\.v} 14 } } */ -- GitLab