diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d84f5bc71f750fe4197cec83acdd7fd9891fdf71..3aa554236ca23328205a59b3c62bc06cdfaa6c73 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2018-04-22 Shiva Chen <shiva0217@gmail.com> + + * config/nds32/nds32-protos.h (nds32_use_load_post_increment): Declare. + * config/nds32/nds32.c (nds32_use_load_post_increment): New. + * config/nds32/nds32.h + (USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT): Define. + (USE_STORE_POST_INCREMENT, USE_STORE_POST_DECREMENT): Define. + 2018-04-22 Shiva Chen <shiva0217@gmail.com> * config/nds32/nds32-protos.h (nds32_ls_333_p): Remove. diff --git a/gcc/config/nds32/nds32-protos.h b/gcc/config/nds32/nds32-protos.h index 7e8111e27558763c79e040c00e2e6110a9accfc9..e7b7d4170ccd3f92c6c85665bd647e71a8d81bc0 100644 --- a/gcc/config/nds32/nds32-protos.h +++ b/gcc/config/nds32/nds32-protos.h @@ -275,6 +275,8 @@ rtx extract_branch_target_rtx (rtx_insn *); rtx extract_branch_condition_rtx (rtx_insn *); } // namespace nds32 +extern bool nds32_use_load_post_increment(machine_mode); + /* Functions for create nds32 specific optimization pass. */ extern rtl_opt_pass *make_pass_nds32_relax_opt (gcc::context *); diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c index 997cc7672d0af70338385a5ff4ffb6dc1219435a..9a8c71204ea1b029e39bb1c2047686745bfa9a1d 100644 --- a/gcc/config/nds32/nds32.c +++ b/gcc/config/nds32/nds32.c @@ -1354,6 +1354,14 @@ nds32_naked_function_p (tree func) return (t != NULL_TREE); } +/* Function that determine whether a load postincrement is a good thing to use + for a given mode. */ +bool +nds32_use_load_post_increment (machine_mode mode) +{ + return (GET_MODE_SIZE (mode) <= GET_MODE_SIZE(E_DImode)); +} + /* Function that check if 'X' is a valid address register. The variable 'STRICT' is very important to make decision for register number. diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h index c5d1e27e0eb99f4fed488664b92f82b7a5c04d85..29edccdd040b5b11db341738c508379e48729368 100644 --- a/gcc/config/nds32/nds32.h +++ b/gcc/config/nds32/nds32.h @@ -1083,6 +1083,12 @@ enum reg_class /* We have "LW.bi Rt, [Ra], Rb" instruction form. */ #define HAVE_POST_MODIFY_REG 1 +#define USE_LOAD_POST_INCREMENT(mode) \ + nds32_use_load_post_increment(mode) +#define USE_LOAD_POST_DECREMENT(mode) USE_LOAD_POST_INCREMENT(mode) +#define USE_STORE_POST_DECREMENT(mode) USE_LOAD_POST_DECREMENT(mode) +#define USE_STORE_POST_INCREMENT(mode) USE_LOAD_POST_INCREMENT(mode) + #define CONSTANT_ADDRESS_P(x) (CONSTANT_P (x) && GET_CODE (x) != CONST_DOUBLE) #define MAX_REGS_PER_ADDRESS 3