diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0caee958f9084e7789bdff532a484642d291f974..7a87e402dd8d30545e433740e398237180f1d260 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,187 @@ +2023-10-19 Marek Polacek <polacek@redhat.com> + + * doc/contrib.texi: Add entry for Patrick Palka. + +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function + compatible with mask parameters in clone. + * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean + typed masks. + (vectorizable_simd_clone_call): Enable the use of masked clones in + fully masked loops. + +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR tree-optimization/110485 + * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial + vectors usage if a notinbranch simdclone has been selected. + +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case + simd clone calls and only use types that are mapped to vectors. + (simd_clone_call_p): New helper function. + +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept + poly NIT and ALT_BOUND. + +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-parloops.cc (create_loop_fn): Copy specific target and + optimization options to clone. + +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * omp-simd-clone.cc (simd_clone_subparts): Remove. + (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with + TYPE_VECTOR_SUBPARTS. + (ipa_simd_modify_function_body): Likewise. + * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise. + (simd_clone_subparts): Remove. + +2023-10-19 Jason Merrill <jason@redhat.com> + + * ABOUT-GCC-NLS: Add usage guidance. + +2023-10-19 Jason Merrill <jason@redhat.com> + + * diagnostic-core.h (permerror): Rename new overloads... + (permerror_opt): To this. + * diagnostic.cc: Likewise. + +2023-10-19 Tamar Christina <tamar.christina@arm.com> + + PR tree-optimization/111860 + * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): + Remove PHI nodes that dominate loop. + +2023-10-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/111131 + * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make + sure to update all gather/scatter stmt DRs, not only those + that eventually got VMAT_GATHER_SCATTER set. + * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add. + (vect_get_and_check_slp_defs): Handle gathers/scatters, + adding the offset as SLP operand and comparing base and scale. + (vect_build_slp_tree_1): Handle gathers. + (vect_build_slp_tree_2): Likewise. + +2023-10-19 Richard Biener <rguenther@suse.de> + + * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename + to ... + (vect_build_one_gather_load_call): ... this. Refactor, + inline widening/narrowing support ... + (vectorizable_load): ... here, do gather vectorization + with builtin decls along other gather vectorization. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ... + (load_pair_dw_<TX:mode><TX2:mode>): ... this. + (store_pair_dw_tftf): Rename to ... + (store_pair_dw_<TX:mode><TX2:mode>): ... this. + * config/aarch64/iterators.md (TX2): New. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new + parameter to give final insn position, infer use of mem if it isn't + specified explicitly. + (function_info::change_insns): Pass down final insn position to + finalize_new_accesses. + * rtl-ssa/functions.h: Add parameter to finalize_new_accesses. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * rtl-ssa/accesses.cc (function_info::reparent_use): New. + * rtl-ssa/functions.h (function_info): Declare new member + function reparent_use. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * rtl-ssa/access-utils.h (drop_memory_access): New. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we + update the prev pointer on the following nondebug insn in the + case that !insn->is_debug_insn () && next->is_debug_insn (). + +2023-10-19 Haochen Jiang <haochen.jiang@intel.com> + + * config/i386/i386.h: Correct the ISA enabled for Arrow Lake. + Also make Clearwater Forest depends on Sierra Forest. + * config/i386/i386-options.cc: Revise the order of the macro + definition to avoid confusion. + * doc/extend.texi: Revise documentation. + * doc/invoke.texi: Correct documentation. + +2023-10-19 Andrew Stubbs <ams@codesourcery.com> + + * config.gcc (amdgcn): Switch default to --with-arch=gfx900. + Implement support for --with-multilib-list. + * config/gcn/t-gcn-hsa: Likewise. + * doc/install.texi: Likewise. + * doc/invoke.texi: Mark Fiji deprecated. + +2023-10-19 Jiahao Xu <xujiahao@loongson.cn> + + * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from + vector_costs. Add a constructor. + (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to + adjust the cost for inner loops. + (loongarch_vector_costs::count_operations): New function. + (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto. + (loongarch_vector_costs::finish_cost): Ditto. + (loongarch_builtin_vectorization_cost): Adjust. + * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter. + (loongarcg-vect-issue-info): Ditto. + (mmemvec-cost): Delete. + * config/loongarch/genopts/loongarch.opt.in + (loongarch-vect-unroll-limit): Ditto. + (loongarcg-vect-issue-info): Ditto. + (mmemvec-cost): Delete. + * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option. + +2023-10-19 Jiahao Xu <xujiahao@loongson.cn> + + * config/loongarch/lasx.md + (vec_widen_<su>mult_even_v8si): New patterns. + (vec_widen_<su>add_hi_<mode>): Ditto. + (vec_widen_<su>add_lo_<mode>): Ditto. + (vec_widen_<su>sub_hi_<mode>): Ditto. + (vec_widen_<su>sub_lo_<mode>): Ditto. + (vec_widen_<su>mult_hi_<mode>): Ditto. + (vec_widen_<su>mult_lo_<mode>): Ditto. + * config/loongarch/loongarch.md (u_bool): New iterator. + * config/loongarch/loongarch-protos.h + (loongarch_expand_vec_widen_hilo): New prototype. + * config/loongarch/loongarch.cc + (loongarch_expand_vec_interleave): New function. + (loongarch_expand_vec_widen_hilo): New function. + +2023-10-19 Jiahao Xu <xujiahao@loongson.cn> + + * config/loongarch/lasx.md + (avg<mode>3_ceil): New patterns. + (uavg<mode>3_ceil): Ditto. + (avg<mode>3_floor): Ditto. + (uavg<mode>3_floor): Ditto. + (usadv32qi): Ditto. + (ssadv32qi): Ditto. + * config/loongarch/lsx.md + (avg<mode>3_ceil): New patterns. + (uavg<mode>3_ceil): Ditto. + (avg<mode>3_floor): Ditto. + (uavg<mode>3_floor): Ditto. + (usadv16qi): Ditto. + (ssadv16qi): Ditto. + 2023-10-18 Andrew Pinski <pinskia@gmail.com> PR middle-end/111863 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 1e71ea70cb340049daecd4273d12a740676fa2e8..5402eeba5fc77b211f12127a0d4e86a39cc267c6 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20231019 +20231020 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 6cf1a63161d09b51a1598ce0128f6f5c660b7a11..8e635ab438372a9bac1777014f936e7c11d44676 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,78 @@ +2023-10-19 Yannick Moy <moy@adacore.com> + + * aspects.ads: Add aspect Side_Effects. + * contracts.adb (Add_Pre_Post_Condition) + (Inherit_Subprogram_Contract): Add support for new contract. + * contracts.ads: Update comments. + * einfo-utils.adb (Get_Pragma): Add support. + * einfo-utils.ads (Prag): Update comment. + * errout.ads: Add explain codes. + * par-prag.adb (Prag): Add support. + * sem_ch13.adb (Analyze_Aspect_Specifications) + (Check_Aspect_At_Freeze_Point): Add support. + * sem_ch6.adb (Analyze_Subprogram_Body_Helper) + (Analyze_Subprogram_Declaration): Call new analysis procedure to + check SPARK legality rules. + (Analyze_SPARK_Subprogram_Specification): New procedure to check + SPARK legality rules. Use an explain code for the error. + (Analyze_Subprogram_Specification): Move checks to new subprogram. + This code was effectively dead, as the kind for parameters was set + to E_Void at this point to detect early references. + * sem_ch6.ads (Analyze_Subprogram_Specification): Add new + procedure. + * sem_prag.adb (Analyze_Depends_In_Decl_Part) + (Analyze_Global_In_Decl_Part): Adapt legality check to apply only + to functions without side-effects. + (Analyze_If_Present): Extract functionality in new procedure + Analyze_If_Present_Internal. + (Analyze_If_Present_Internal): New procedure to analyze given + pragma kind. + (Analyze_Pragmas_If_Present): New procedure to analyze given + pragma kind associated with a declaration. + (Analyze_Pragma): Adapt support for Always_Terminates and + Exceptional_Cases. Add support for Side_Effects. Make sure to call + Analyze_If_Present to ensure pragma Side_Effects is analyzed prior + to analyzing pragmas Global and Depends. Use explain codes for the + errors. + * sem_prag.ads (Analyze_Pragmas_If_Present): Add new procedure. + * sem_util.adb (Is_Function_With_Side_Effects): New query function + to determine if a function is a function with side-effects. + * sem_util.ads (Is_Function_With_Side_Effects): Same. + * snames.ads-tmpl: Declare new names for pragma and aspect. + * doc/gnat_rm/implementation_defined_aspects.rst: Document new aspect. + * doc/gnat_rm/implementation_defined_pragmas.rst: Document new pragma. + * gnat_rm.texi: Regenerate. + +2023-10-19 Sheri Bernstein <bernstein@adacore.com> + + * libgnat/s-imagef.adb (Set_Image_Fixed): Refactor loop. + +2023-10-19 Sheri Bernstein <bernstein@adacore.com> + + * libgnat/s-imguti.adb (Set_Decimal_Digits): Add pragma to exempt + Unassigned_OUT_Parameters. + (Set_Floating_Invalid_Value): Likewise + +2023-10-19 Patrick Bernardi <bernardi@adacore.com> + + * bindusg.adb (Display): Make it clear -Q adds to the number of + secondary stacks generated by the binder. + * doc/gnat_ugn/building_executable_programs_with_gnat.rst: + Document the -Q gnatbind switch and fix references to old + runtimes. + * gnat-style.texi: Regenerate. + * gnat_rm.texi: Regenerate. + * gnat_ugn.texi: Regenerate. + +2023-10-19 Ronan Desplanques <desplanques@adacore.com> + + * sem_ch3.adb (Constrain_Array): Replace manual list length + computation by call to List_Length. + +2023-10-19 Piotr Trojanek <trojanek@adacore.com> + + * exp_aggr.adb (Expand_Container_Aggregate): Simplify with "No". + 2023-10-10 Eric Botcazou <ebotcazou@adacore.com> * gcc-interface/decl.cc (inline_status_for_subprog): Minor tweak. diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index b4b1b908c6345acdc05be705cf3c532842cdda70..bca51dfc034dde62ee4c8c5dbe5f290b61c5981b 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,9 @@ +2023-10-19 Lewis Hyatt <lhyatt@gmail.com> + + PR c++/89038 + * c-pragma.cc (handle_pragma_diagnostic_impl): Handle + -Wunknown-pragmas during early processing. + 2023-10-15 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/111800 diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index cd21db2dbfee4a76087785f9388d805c8ef19438..a779fa4139b5a5a847641cc39b10bc4cf333ac87 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,15 @@ +2023-10-19 Andrew Pinski <pinskia@gmail.com> + + PR c/100532 + * c-typeck.cc (convert_argument): After erroring out + about an incomplete type return error_mark_node. + +2023-10-19 Andrew Pinski <pinskia@gmail.com> + + PR c/104822 + * c-typeck.cc (convert_for_assignment): Check for null pointer + before warning about an incompatible scalar storage order. + 2023-10-18 Andrew Pinski <pinskia@gmail.com> PR c/101364 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 14e249ebe25ef4fbe09ee6f977b7833adc73de4f..9de839dc95c63a5e9299af2871261081ea2225ee 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,17 @@ +2023-10-19 Marek Polacek <polacek@redhat.com> + + * cp-gimplify.cc (cp_fold_r): Don't call maybe_constant_value. + +2023-10-19 Jason Merrill <jason@redhat.com> + + * typeck2.cc (check_narrowing): Adjust. + +2023-10-19 Jason Merrill <jason@redhat.com> + + * parser.cc (cp_parser_primary_expression): Use G_. + (cp_parser_using_enum): Likewise. + * decl.cc (identify_goto): Likewise. + 2023-10-18 Jason Merrill <jason@redhat.com> * typeck2.cc (check_narrowing): Use permerror. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 66438e01442aff573417091da2ca0decd3d55597..46cd2f6f786ecfca7cb19d3980ad4d470bfbe21d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,90 @@ +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * gcc.dg/gomp/pr110485.c: New test. + +2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * gcc.dg/vect/vect-simd-clone-16f.c: Remove unnecessary differentation + between targets with different pointer sizes. + * gcc.dg/vect/vect-simd-clone-17f.c: Likewise. + * gcc.dg/vect/vect-simd-clone-18f.c: Likewise. + +2023-10-19 Andrew Pinski <pinskia@gmail.com> + + PR c/100532 + * gcc.dg/pr100532-1.c: New test. + +2023-10-19 Andrew Pinski <pinskia@gmail.com> + + PR c/104822 + * gcc.dg/sso-18.c: New test. + * gcc.dg/sso-19.c: New test. + +2023-10-19 Lewis Hyatt <lhyatt@gmail.com> + + PR c++/89038 + * c-c++-common/cpp/Wunknown-pragmas-1.c: New test. + +2023-10-19 Lewis Hyatt <lhyatt@gmail.com> + + PR preprocessor/82335 + * c-c++-common/cpp/diagnostic-pragma-3.c: New test. + +2023-10-19 Tamar Christina <tamar.christina@arm.com> + + PR tree-optimization/111860 + * gcc.dg/vect/pr111860.c: New test. + +2023-10-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/111131 + * gcc.dg/vect/vect-gather-1.c: Now expected to vectorize + everywhere. + * gcc.dg/vect/vect-gather-2.c: Expected to not SLP anywhere. + Massage the scale case to more reliably produce a different + one. Scan for the specific messages. + * gcc.dg/vect/vect-gather-3.c: Masked gather is also supported + for AVX2, but not emulated. + * gcc.dg/vect/vect-gather-4.c: Expected to not SLP anywhere. + Massage to more properly ensure this. + * gcc.dg/vect/tsvc/vect-tsvc-s353.c: Expect to vectorize + everywhere. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * gcc.target/aarch64/pr71727.c: Adjust scan-assembler-not to + make sure we don't have q-register stores with -mstrict-align. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * gcc.target/aarch64/sve/pcs/args_9.c: Adjust scan-assemblers to + allow for stp. + +2023-10-19 Alex Coplan <alex.coplan@arm.com> + + * gcc.target/aarch64/lr_free_1.c: Add + --param=aarch64-stp-policy=never to dg-options. + +2023-10-19 Haochen Jiang <haochen.jiang@intel.com> + + * gcc.target/i386/funcspec-56.inc: Group Clearwater Forest + with atom cores. + +2023-10-19 Jiahao Xu <xujiahao@loongson.cn> + + * gcc.target/loongarch/vect-widen-add.c: New test. + * gcc.target/loongarch/vect-widen-mul.c: New test. + * gcc.target/loongarch/vect-widen-sub.c: New test. + +2023-10-19 Jiahao Xu <xujiahao@loongson.cn> + + * gcc.target/loongarch/avg-ceil-lasx.c: New test. + * gcc.target/loongarch/avg-ceil-lsx.c: New test. + * gcc.target/loongarch/avg-floor-lasx.c: New test. + * gcc.target/loongarch/avg-floor-lsx.c: New test. + * gcc.target/loongarch/sad-lasx.c: New test. + * gcc.target/loongarch/sad-lsx.c: New test. + 2023-10-18 Andrew Pinski <pinskia@gmail.com> PR middle-end/111863 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 7a41e8e8739f00031e0f11ed8b3e6098c74e2c41..45d482a78bef1dd9c9749ca8c7178370b94fe635 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,14 @@ +2023-10-19 François Dumont <fdumont@gcc.gnu.org> + + * include/bits/hashtable_policy.h + (_Hash_code_base::_M_hash_code(const _Hash&, const _Hash_node_value<>&)): Remove. + (_Hash_code_base::_M_hash_code<_H2>(const _H2&, const _Hash_node_value<>&)): Remove. + * include/bits/hashtable.h + (_M_src_hash_code<_H2>(const _H2&, const key_type&, const __node_value_type&)): New. + (_M_merge_unique<>, _M_merge_multi<>): Use latter. + * testsuite/23_containers/unordered_map/modifiers/merge.cc + (test04, test05, test06): New test cases. + 2023-10-13 Jakub Jelinek <jakub@redhat.com> * testsuite/tr1/8_c_compatibility/cstdio/functions.cc (test01):