diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 9926a7b63bb55bda8db538361d31728dd238b0a6..3735a5ba65943e5d39cbda426184ec3c460d8a32 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1505,10 +1505,11 @@ expand_const_vector (rtx target, rtx src)
 		{
 		  /* { 1, 1, 2, 1, ... }.  */
 		  rtx scalar = expand_simple_binop (
-		    new_smode, ASHIFT,
-		    gen_int_mode (rtx_to_poly_int64 (base2), new_smode),
-		    gen_int_mode (builder.inner_bits_size (), new_smode),
+		    Xmode, ASHIFT,
+		    gen_int_mode (rtx_to_poly_int64 (base2), Xmode),
+		    gen_int_mode (builder.inner_bits_size (), Xmode),
 		    NULL_RTX, false, OPTAB_DIRECT);
+		  scalar = simplify_gen_subreg (new_smode, scalar, Xmode, 0);
 		  rtx tmp2 = gen_reg_rtx (new_mode);
 		  rtx ior_ops[] = {tmp2, tmp1, scalar};
 		  emit_vlmax_insn (code_for_pred_scalar (IOR, new_mode),