diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82c968ca6f7e1841263c3a533e5f4da7319d6f53..b45840fda7ed2aa5b729dd985c059b791f9ff1b1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2012-06-29 Steven Bosscher <steven@gcc.gnu.org> + + * system.h (CASE_USE_BIT_TESTS): Poison. + * stmt.c (CASE_USE_BIT_TESTS): Fold away into its only user ... + (expand_switch_using_bit_tests_p): ...here. + * doc/tm.texi.in (CASE_USE_BIT_TESTS): Remove documentation. + * doc/tm.texi (CASE_USE_BIT_TESTS): Regenerate. + 2012-06-29 Steven Bosscher <steven@gcc.gnu.org> * system.h (IFCVT_EXTRA_FIELDS): Poison. diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 282bc14833de00f3316305a3e1a6044a91da5c58..a11e2c03ab550500183412675dff8b224bb92506 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -10306,16 +10306,6 @@ The default is four for machines with a @code{casesi} instruction and five otherwise. This is best for most machines. @end deftypefn -@defmac CASE_USE_BIT_TESTS -Define this macro to be a C expression to indicate whether C switch -statements may be implemented by a sequence of bit tests. This is -advantageous on processors that can efficiently implement left shift -of 1 by the number of bits held in a register, but inappropriate on -targets that would require a loop. By default, this macro returns -@code{true} if the target defines an @code{ashlsi3} pattern, and -@code{false} otherwise. -@end defmac - @defmac WORD_REGISTER_OPERATIONS Define this macro if operations between registers with integral mode smaller than a word are always performed on the entire register. diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 6f97b28147884f6b6b09983f169836ebf8849ff3..4ec246938063cb3db6ec7ed11c3c8cb9bcfc6c30 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -10180,16 +10180,6 @@ The default is four for machines with a @code{casesi} instruction and five otherwise. This is best for most machines. @end deftypefn -@defmac CASE_USE_BIT_TESTS -Define this macro to be a C expression to indicate whether C switch -statements may be implemented by a sequence of bit tests. This is -advantageous on processors that can efficiently implement left shift -of 1 by the number of bits held in a register, but inappropriate on -targets that would require a loop. By default, this macro returns -@code{true} if the target defines an @code{ashlsi3} pattern, and -@code{false} otherwise. -@end defmac - @defmac WORD_REGISTER_OPERATIONS Define this macro if operations between registers with integral mode smaller than a word are always performed on the entire register. diff --git a/gcc/stmt.c b/gcc/stmt.c index 4ad4d0f1e595f32e0ca61c17b8d319109c6680b8..ea0d3a58d97031689dcaea6d0ba8187680494efc 100644 --- a/gcc/stmt.c +++ b/gcc/stmt.c @@ -1722,13 +1722,6 @@ add_case_node (struct case_node *head, tree type, tree low, tree high, /* Maximum number of case bit tests. */ #define MAX_CASE_BIT_TESTS 3 -/* By default, enable case bit tests on targets with ashlsi3. */ -#ifndef CASE_USE_BIT_TESTS -#define CASE_USE_BIT_TESTS (optab_handler (ashl_optab, word_mode) \ - != CODE_FOR_nothing) -#endif - - /* A case_bit_test represents a set of case nodes that may be selected from using a bit-wise comparison. HI and LO hold the integer to be tested against, LABEL contains the label @@ -1888,8 +1881,10 @@ bool expand_switch_using_bit_tests_p (tree index_expr, tree range, unsigned int uniq, unsigned int count) { - return (CASE_USE_BIT_TESTS - && ! TREE_CONSTANT (index_expr) + if (optab_handler (ashl_optab, word_mode) == CODE_FOR_nothing) + return false; + + return (! TREE_CONSTANT (index_expr) && compare_tree_int (range, GET_MODE_BITSIZE (word_mode)) < 0 && compare_tree_int (range, 0) > 0 && lshift_cheap_p () diff --git a/gcc/system.h b/gcc/system.h index d2e9e51bc0e396b542e4f5a1b092194956d1e8d5..f8b52324bd426cf9b1e9017a9ccd14b066a1b705 100644 --- a/gcc/system.h +++ b/gcc/system.h @@ -895,7 +895,8 @@ extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN; TARGET_ALIGN_ANON_BITFIELDS TARGET_NARROW_VOLATILE_BITFIELDS \ IDENT_ASM_OP UNALIGNED_SHORT_ASM_OP UNALIGNED_INT_ASM_OP \ UNALIGNED_LONG_ASM_OP UNALIGNED_DOUBLE_INT_ASM_OP \ - USE_COMMON_FOR_ONE_ONLY IFCVT_EXTRA_FIELDS IFCVT_INIT_EXTRA_FIELDS + USE_COMMON_FOR_ONE_ONLY IFCVT_EXTRA_FIELDS IFCVT_INIT_EXTRA_FIELDS \ + CASE_USE_BIT_TESTS /* Hooks that are no longer used. */ #pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE \