diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 58c9a9193f5f5e5e7d40ae75f0f67a12ad7857b8..58459159de728f092b1ace852ff06a18078d1c63 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,326 @@
+2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
+
+ * doc/extend.texi (Common Function Attributes): Remove duplicate
+ word.
+
+2023-04-20 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/109564
+ * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
+ UNDEFINED range names when deciding if all PHI arguments are the same,
+
+2023-04-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/109011
+ * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
+ .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
+ .CTZ (X) = PREC - .POPCOUNT (X | -X).
+
+2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
+
+ * lra-constraints.cc (match_reload): Exclude some hard regs for
+ multi-reg inout reload pseudos used in asm in different mode.
+
+2023-04-20 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/arm/arm.cc (thumb1_legitimate_address_p):
+ Use VIRTUAL_REGISTER_P predicate.
+ (arm_eliminable_register): Ditto.
+ * config/avr/avr.md (push<mode>_1): Ditto.
+ * config/bfin/predicates.md (register_no_elim_operand): Ditto.
+ * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
+ * config/i386/predicates.md (register_no_elim_operand): Ditto.
+ * config/iq2000/predicates.md (call_insn_operand): Ditto.
+ * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
+
+2023-04-20 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/78952
+ * config/i386/predicates.md (extract_operator): New predicate.
+ * config/i386/i386.md (any_extract): Remove code iterator.
+ (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
+ (*cmpqi_ext<mode>_1): Ditto.
+ (*cmpqi_ext<mode>_2): Ditto.
+ (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
+ (*cmpqi_ext<mode>_3): Ditto.
+ (*cmpqi_ext<mode>_4): Ditto.
+ (*extzvqi_mem_rex64): Ditto.
+ (*extzvqi): Ditto.
+ (*insvqi_2): Ditto.
+ (*extendqi<SWI24:mode>_ext_1): Ditto.
+ (*addqi_ext<mode>_0): Ditto.
+ (*addqi_ext<mode>_1): Ditto.
+ (*addqi_ext<mode>_2): Ditto.
+ (*subqi_ext<mode>_0): Ditto.
+ (*subqi_ext<mode>_2): Ditto.
+ (*testqi_ext<mode>_1): Ditto.
+ (*testqi_ext<mode>_2): Ditto.
+ (*andqi_ext<mode>_0): Ditto.
+ (*andqi_ext<mode>_1): Ditto.
+ (*andqi_ext<mode>_1_cc): Ditto.
+ (*andqi_ext<mode>_2): Ditto.
+ (*<any_or:code>qi_ext<mode>_0): Ditto.
+ (*<any_or:code>qi_ext<mode>_1): Ditto.
+ (*<any_or:code>qi_ext<mode>_2): Ditto.
+ (*xorqi_ext<mode>_1_cc): Ditto.
+ (*negqi_ext<mode>_2): Ditto.
+ (*ashlqi_ext<mode>_2): Ditto.
+ (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
+
+2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
+
+ PR target/108248
+ * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
+ <bitmanip_insn> as the type to allow for fine grained control of
+ scheduling these insns.
+ * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
+ min, max.
+ * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
+ pcnt, signed and unsigned min/max.
+
+2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+ kito-cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
+
+2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+ kito-cheng <kito.cheng@sifive.com>
+
+ PR target/109535
+ * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
+ (pass_vsetvl::cleanup_insns): Fix bug.
+
+2023-04-20 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
+ (ldexp<mode>3): Delete.
+ (ldexp<mode>3<exec>): Change "B" to "A".
+
+2023-04-20 Jakub Jelinek <jakub@redhat.com>
+ Jonathan Wakely <jwakely@redhat.com>
+
+ * tree.h (built_in_function_equal_p): New helper function.
+ (fndecl_built_in_p): Turn into variadic template to support
+ 1 or more built_in_function arguments.
+ * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
+ * gimplify.cc (goa_stabilize_expr): Likewise.
+ * cgraphclones.cc (cgraph_node::create_clone): Likewise.
+ * ipa-fnsummary.cc (compute_fn_summary): Likewise.
+ * omp-low.cc (setjmp_or_longjmp_p): Likewise.
+ * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
+ cgraph_update_edges_for_call_stmt_node,
+ cgraph_edge::verify_corresponds_to_fndecl,
+ cgraph_node::verify_node): Likewise.
+ * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
+ * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
+ * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
+
+2023-04-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/109011
+ * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
+ (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
+ call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
+ direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
+ for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
+ case.
+ (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
+
+2023-04-20 Richard Biener <rguenther@suse.de>
+
+ * df-core.cc (rest_of_handle_df_initialize): Remove
+ computation of df->postorder, df->postorder_inverted and
+ df->n_blocks.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * common/config/i386/i386-common.cc
+ (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
+ (ix86_handle_option): Set AVX flag for VAES.
+ * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
+ Add OPTION_MASK_ISA2_VAES_UNSET.
+ (def_builtin): Share builtin between AES and VAES.
+ * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
+ Ditto.
+ * config/i386/i386.md (aes): New isa attribute.
+ * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
+ (aesenclast): Ditto.
+ (aesdec): Ditto.
+ (aesdeclast): Ditto.
+ * config/i386/vaesintrin.h: Remove redundant avx target push.
+ * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
+ (_mm_aesdeclast_si128): Ditto.
+ (_mm_aesenc_si128): Ditto.
+ (_mm_aesenclast_si128): Ditto.
+
+2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
+
+ * config/i386/avx2intrin.h
+ (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
+ (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
+ (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
+ (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
+ (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
+ (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
+ (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
+ (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
+ (_mm_reduce_add_epi16): New instrinsics.
+ (_mm_reduce_mul_epi16): Ditto.
+ (_mm_reduce_and_epi16): Ditto.
+ (_mm_reduce_or_epi16): Ditto.
+ (_mm_reduce_max_epi16): Ditto.
+ (_mm_reduce_max_epu16): Ditto.
+ (_mm_reduce_min_epi16): Ditto.
+ (_mm_reduce_min_epu16): Ditto.
+ (_mm256_reduce_add_epi16): Ditto.
+ (_mm256_reduce_mul_epi16): Ditto.
+ (_mm256_reduce_and_epi16): Ditto.
+ (_mm256_reduce_or_epi16): Ditto.
+ (_mm256_reduce_max_epi16): Ditto.
+ (_mm256_reduce_max_epu16): Ditto.
+ (_mm256_reduce_min_epi16): Ditto.
+ (_mm256_reduce_min_epu16): Ditto.
+ (_mm_reduce_add_epi8): Ditto.
+ (_mm_reduce_mul_epi8): Ditto.
+ (_mm_reduce_and_epi8): Ditto.
+ (_mm_reduce_or_epi8): Ditto.
+ (_mm_reduce_max_epi8): Ditto.
+ (_mm_reduce_max_epu8): Ditto.
+ (_mm_reduce_min_epi8): Ditto.
+ (_mm_reduce_min_epu8): Ditto.
+ (_mm256_reduce_add_epi8): Ditto.
+ (_mm256_reduce_mul_epi8): Ditto.
+ (_mm256_reduce_and_epi8): Ditto.
+ (_mm256_reduce_or_epi8): Ditto.
+ (_mm256_reduce_max_epi8): Ditto.
+ (_mm256_reduce_max_epu8): Ditto.
+ (_mm256_reduce_min_epi8): Ditto.
+ (_mm256_reduce_min_epu8): Ditto.
+ * config/i386/avx512vlbwintrin.h:
+ (_mm_mask_reduce_add_epi16): Ditto.
+ (_mm_mask_reduce_mul_epi16): Ditto.
+ (_mm_mask_reduce_and_epi16): Ditto.
+ (_mm_mask_reduce_or_epi16): Ditto.
+ (_mm_mask_reduce_max_epi16): Ditto.
+ (_mm_mask_reduce_max_epu16): Ditto.
+ (_mm_mask_reduce_min_epi16): Ditto.
+ (_mm_mask_reduce_min_epu16): Ditto.
+ (_mm256_mask_reduce_add_epi16): Ditto.
+ (_mm256_mask_reduce_mul_epi16): Ditto.
+ (_mm256_mask_reduce_and_epi16): Ditto.
+ (_mm256_mask_reduce_or_epi16): Ditto.
+ (_mm256_mask_reduce_max_epi16): Ditto.
+ (_mm256_mask_reduce_max_epu16): Ditto.
+ (_mm256_mask_reduce_min_epi16): Ditto.
+ (_mm256_mask_reduce_min_epu16): Ditto.
+ (_mm_mask_reduce_add_epi8): Ditto.
+ (_mm_mask_reduce_mul_epi8): Ditto.
+ (_mm_mask_reduce_and_epi8): Ditto.
+ (_mm_mask_reduce_or_epi8): Ditto.
+ (_mm_mask_reduce_max_epi8): Ditto.
+ (_mm_mask_reduce_max_epu8): Ditto.
+ (_mm_mask_reduce_min_epi8): Ditto.
+ (_mm_mask_reduce_min_epu8): Ditto.
+ (_mm256_mask_reduce_add_epi8): Ditto.
+ (_mm256_mask_reduce_mul_epi8): Ditto.
+ (_mm256_mask_reduce_and_epi8): Ditto.
+ (_mm256_mask_reduce_or_epi8): Ditto.
+ (_mm256_mask_reduce_max_epi8): Ditto.
+ (_mm256_mask_reduce_max_epu8): Ditto.
+ (_mm256_mask_reduce_min_epi8): Ditto.
+ (_mm256_mask_reduce_min_epu8): Ditto.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * common/config/i386/i386-common.cc
+ (OPTION_MASK_ISA_VPCLMULQDQ_SET):
+ Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
+ (OPTION_MASK_ISA_AVX_UNSET):
+ Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
+ (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
+ * config/i386/i386.md (vpclmulqdqvl): New.
+ * config/i386/sse.md (pclmulqdq): Add evex encoding.
+ * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
+ push.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * config/i386/avx512vlbwintrin.h
+ (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
+ (_mm_mask_blend_epi8): Ditto.
+ (_mm256_mask_blend_epi16): Ditto.
+ (_mm256_mask_blend_epi8): Ditto.
+ * config/i386/avx512vlintrin.h
+ (_mm256_mask_blend_pd): Ditto.
+ (_mm256_mask_blend_ps): Ditto.
+ (_mm256_mask_blend_epi64): Ditto.
+ (_mm256_mask_blend_epi32): Ditto.
+ (_mm_mask_blend_pd): Ditto.
+ (_mm_mask_blend_ps): Ditto.
+ (_mm_mask_blend_epi64): Ditto.
+ (_mm_mask_blend_epi32): Ditto.
+ * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
+ (VF_AVX512HFBFVL): Move it before the first usage.
+ (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
+ to VF_AVX512HFBFVL.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * common/config/i386/i386-common.cc
+ (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
+ to OPTION_MASK_ISA_AVX512BW_SET.
+ (OPTION_MASK_ISA_AVX512F_UNSET):
+ Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
+ (OPTION_MASK_ISA_AVX512BW_UNSET):
+ Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
+ * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
+ * config/i386/avx512vbmi2vlintrin.h: Ditto.
+ * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
+ * config/i386/sse.md (VI12_AVX512VLBW): Removed.
+ (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
+ (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
+ VI12_AVX512VL.
+ (compressstore<mode>_mask): Ditto.
+ (expand<mode>_mask): Ditto.
+ (expand<mode>_maskz): Ditto.
+ (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
+ VI12_VI48F_AVX512VL.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * common/config/i386/i386-common.cc
+ (OPTION_MASK_ISA_AVX512BITALG_SET):
+ Change OPTION_MASK_ISA_AVX512F_SET
+ to OPTION_MASK_ISA_AVX512BW_SET.
+ (OPTION_MASK_ISA_AVX512F_UNSET):
+ Remove OPTION_MASK_ISA_AVX512BITALG_SET.
+ (OPTION_MASK_ISA_AVX512BW_UNSET):
+ Add OPTION_MASK_ISA_AVX512BITALG_SET.
+ * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
+ * config/i386/i386-builtin.def:
+ Remove redundant OPTION_MASK_ISA_AVX512BW.
+ * config/i386/sse.md (VI1_AVX512VLBW): Removed.
+ (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
+ Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * config/i386/i386-expand.cc
+ (ix86_check_builtin_isa_match): Correct wrong comments.
+ Add a new macro SHARE_BUILTIN and refactor the current if
+ clauses to macro.
+
+2023-04-20 Mo, Zewei <zewei.mo@intel.com>
+
+ * config/i386/cpuid.h: Open a new section for Extended Features
+ Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
+ %ecx == 1).
+
+2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
+
+ * config/i386/sse.md: Modify insn vperm{i,f}
+ and vshuf{i,f}.
+
2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
* config/xtensa/xtensa-opts.h: New header.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 758629bff2e6becdabdf412f3e4f1cbac6bd016c..1bf412b8655b9598a3b3faf6d9d34b0fb370a1f4 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230420
+20230421
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index f23b3ba65dae754c63b062b83372e64f1ab32359..fc9b66ddae1a5679714890bafc77ada92d39f0dd 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,9 @@
+2023-04-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/107041
+ * c-decl.cc (diagnose_mismatched_decls): Avoid -Wenum-int-mismatch
+ warning on acc_on_device declaration.
+
2023-03-28 David Malcolm <dmalcolm@redhat.com>
PR c/107002
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index ee08b14991d26183a623250a37ff80e11b5b2078..d8da7f041b3fa21d32fd551e68a33ac27bfc4b82 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,40 @@
+2023-04-20 Patrick Palka <ppalka@redhat.com>
+
+ * pt.cc (tsubst) <case TEMPLATE_TYPE_PARM>: Don't recurse when
+ level lowering a cv-qualified type template parameter. Remove
+ recursive loop breaker in the level lowering case for constrained
+ autos. Use the TEMPLATE_PARM_DESCENDANTS cache in this case as
+ well.
+
+2023-04-20 Patrick Palka <ppalka@redhat.com>
+
+ * constraint.cc (diagnose_trait_expr): Convert a TREE_VEC
+ of arguments into a TREE_LIST for sake of pretty printing.
+ * cxx-pretty-print.cc (pp_cxx_trait): Handle TREE_VEC
+ instead of TREE_LIST of trailing variadic trait arguments.
+ * method.cc (constructible_expr): Likewise.
+ (is_xible_helper): Likewise.
+ * parser.cc (cp_parser_trait): Represent trailing variadic trait
+ arguments as a TREE_VEC instead of TREE_LIST.
+ * pt.cc (value_dependent_expression_p): Handle TREE_VEC
+ instead of TREE_LIST of trailing variadic trait arguments.
+ * semantics.cc (finish_type_pack_element): Likewise.
+ (check_trait_type): Likewise.
+
+2023-04-20 Patrick Palka <ppalka@redhat.com>
+
+ * tree.cc (strip_typedefs): Move TREE_LIST handling to
+ strip_typedefs_expr. Dispatch to strip_typedefs_expr for
+ non-type 't'.
+ <case TYPENAME_TYPE>: Remove manual dispatching to
+ strip_typedefs_expr.
+ <case TRAIT_TYPE>: Likewise.
+ (strip_typedefs_expr): Replaces calls to strip_typedefs_expr
+ with strip_typedefs throughout. Don't dispatch to strip_typedefs
+ for type 't'.
+ <case TREE_LIST>: Replace this with the better version from
+ strip_typedefs.
+
2023-04-19 Patrick Palka <ppalka@redhat.com>
Jonathan Wakely <jwakely@redhat.com>
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4fa4c519a8a56fdc7d128fb1ae49897a6a12ce5c..353747f60eca971a484dce5fa1a371af7557639c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,171 @@
+2023-04-20 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/109564
+ * gcc.dg/torture/pr109564-1.c: New testcase.
+ * gcc.dg/torture/pr109564-2.c: Likewise.
+ * gcc.dg/tree-ssa/evrp-ignore.c: XFAIL.
+ * gcc.dg/tree-ssa/vrp06.c: Likewise.
+
+2023-04-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/107041
+ * gcc.dg/goacc/pr107041.c: New test.
+
+2023-04-20 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/78952
+ * gcc.target/i386/pr78952-4.c: New test.
+
+2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+ kito-cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/rvv/base/spill-4.c: Adapt testcase.
+ * gcc.target/riscv/rvv/base/spill-6.c: Adapt testcase.
+ * gcc.target/riscv/rvv/base/reg_order-1.c: New test.
+
+2023-04-20 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/arch-19.c: Add -misa-spec.
+
+2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
+ kito-cheng <kito.cheng@sifive.com>
+
+ PR target/109535
+ * g++.target/riscv/rvv/base/pr109535.C: New test.
+ * gcc.target/riscv/rvv/base/pr109535.c: New test.
+
+2023-04-20 Kito Cheng <kito.cheng@sifive.com>
+
+ * gcc.target/riscv/simplify_ior_optimization.c: Use stdint-gcc.h
+ rather than stdint.h
+
+2023-04-20 Andrew Stubbs <ams@codesourcery.com>
+
+ * lib/target-supports.exp
+ (check_effective_target_vect_call_copysignf): Add amdgcn.
+ (check_effective_target_vect_call_sqrtf): Add amdgcn.
+ (check_effective_target_vect_call_ceilf): Add amdgcn.
+ (check_effective_target_vect_call_floor): Add amdgcn.
+ (check_effective_target_vect_logical_reduc): Add amdgcn.
+
+2023-04-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/109011
+ * gcc.dg/vect/pr109011-1.c: Remove -mpower9-vector from
+ dg-additional-options.
+ (baz, qux): Remove functions and corresponding dg-final.
+ * gcc.dg/vect/pr109011-2.c: New test.
+ * gcc.dg/vect/pr109011-3.c: New test.
+ * gcc.dg/vect/pr109011-4.c: New test.
+ * gcc.dg/vect/pr109011-5.c: New test.
+
+2023-04-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/108099
+ PR testsuite/109560
+ * g++.dg/ext/int128-8.C: Require int128 effective target.
+
+2023-04-20 Jiufu Guo <guojiufu@linux.ibm.com>
+
+ PR testsuite/106879
+ * gcc.dg/vect/bb-slp-layout-19.c: Modify to guard the check with
+ vect_hw_misalign on POWERs.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * gcc.target/i386/avx512fvl-vaes-1.c: Add VAES xmm test.
+ * gcc.target/i386/pr109117-1.c: Modify error message.
+
+2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
+
+ * gcc.target/i386/avx512vlbw-reduce-op-1.c: New test.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * gcc.target/i386/vpclmulqdq.c: Add compile test for xmm.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * gcc.target/i386/avx512bw-pr100267-1.c: Remove avx512f and avx512bw.
+ * gcc.target/i386/avx512bw-pr100267-b-2.c: Ditto.
+ * gcc.target/i386/avx512bw-pr100267-d-2.c: Ditto.
+ * gcc.target/i386/avx512bw-pr100267-q-2.c: Ditto.
+ * gcc.target/i386/avx512bw-pr100267-w-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpcompressb-1.c: Ditto.
+ * gcc.target/i386/avx512f-vpcompressb-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpcompressw-1.c: Ditto.
+ * gcc.target/i386/avx512f-vpcompressw-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpexpandb-1.c: Ditto.
+ * gcc.target/i386/avx512f-vpexpandb-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpexpandw-1.c: Ditto.
+ * gcc.target/i386/avx512f-vpexpandw-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshld-1.c: Ditto.
+ * gcc.target/i386/avx512f-vpshldd-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshldq-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshldv-1.c: Ditto.
+ * gcc.target/i386/avx512f-vpshldvd-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshldvq-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshldvw-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshrdd-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshrdq-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshrdv-1.c: Ditto.
+ * gcc.target/i386/avx512f-vpshrdvd-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshrdvq-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshrdvw-2.c: Ditto.
+ * gcc.target/i386/avx512f-vpshrdw-2.c: Ditto.
+ * gcc.target/i386/avx512vbmi2-vpshld-1.c: Ditto.
+ * gcc.target/i386/avx512vbmi2-vpshrd-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vpcompressb-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vpcompressb-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpcompressw-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpexpandb-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vpexpandb-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpexpandw-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vpexpandw-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshldd-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshldq-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshldv-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshldvd-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshldvq-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshldvw-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshrdd-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshrdq-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshrdv-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshrdvd-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshrdvq-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshrdvw-2.c: Ditto.
+ * gcc.target/i386/avx512vl-vpshrdw-2.c: Ditto.
+ * gcc.target/i386/avx512vlbw-pr100267-1.c: Ditto.
+ * gcc.target/i386/avx512vlbw-pr100267-b-2.c: Ditto.
+ * gcc.target/i386/avx512vlbw-pr100267-w-2.c: Ditto.
+
+2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
+
+ * gcc.target/i386/avx512bitalg-vpopcntb-1.c:
+ Remove avx512bw.
+ * gcc.target/i386/avx512bitalg-vpopcntb.c: Ditto.
+ * gcc.target/i386/avx512bitalg-vpopcntbvl.c: Ditto.
+ * gcc.target/i386/avx512bitalg-vpopcntw-1.c: Ditto.
+ * gcc.target/i386/avx512bitalg-vpopcntw.c: Ditto.
+ * gcc.target/i386/avx512bitalg-vpopcntwvl.c: Ditto.
+ * gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Ditto.
+ * gcc.target/i386/avx512bitalg-vpshufbitqmb.c: Ditto.
+ * gcc.target/i386/avx512bitalgvl-vpopcntb-1.c: Ditto.
+ * gcc.target/i386/avx512bitalgvl-vpopcntw-1.c: Ditto.
+ * gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Ditto.
+ * gcc.target/i386/pr93696-1.c: Ditto.
+ * gcc.target/i386/pr93696-2.c: Ditto.
+
+2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
+
+ * gcc.target/i386/avx512vl-vshuff32x4-1.c: Modify test.
+ * gcc.target/i386/avx512vl-vshuff64x2-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vshufi32x4-1.c: Ditto.
+ * gcc.target/i386/avx512vl-vshufi64x2-1.c: Ditto.
+ * gcc.target/i386/opt-vperm-vshuf-1.c: New test.
+ * gcc.target/i386/opt-vperm-vshuf-2.c: Ditto.
+ * gcc.target/i386/opt-vperm-vshuf-3.c: Ditto.
+
2023-04-19 Patrick Palka <ppalka@redhat.com>
Jonathan Wakely <jwakely@redhat.com>
diff --git a/maintainer-scripts/ChangeLog b/maintainer-scripts/ChangeLog
index 8e7fbf50615fda2df5533fa545d8fee7d877a0a9..9cbef6d8526ff6d6f1881cc291169166da3e2278 100644
--- a/maintainer-scripts/ChangeLog
+++ b/maintainer-scripts/ChangeLog
@@ -1,3 +1,9 @@
+2023-04-20 Arsen Arsenović <arsen@aarsen.me>
+
+ * update_web_docs_git: Add a mechanism to override makeinfo,
+ texi2dvi and texi2pdf, and default them to
+ /home/gccadmin/texinfo/install-git/bin/${tool}, if present.
+
2023-04-17 Jakub Jelinek <jakub@redhat.com>
* crontab: Snapshots from trunk are now GCC 14 related.