From d060f8a4fff81a117923adac1e02edb64160b31b Mon Sep 17 00:00:00 2001
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Tue, 7 Nov 2023 06:35:31 +0800
Subject: [PATCH] test: Fix XPASS of bb-slp-43.c for RVV
RVV is variable length vector but also has 256 bit VLS mode vector.
This test is vectorized as:
f:
vsetivli zero,8,e32,m2,ta,ma
vle32.v v2,0(a0)
vmv.v.i v4,1
vle16.v v1,0(a1)
vmseq.vv v0,v2,v4
vsetvli zero,zero,e16,m1,ta,ma
vmseq.vi v1,v1,2
vsetvli zero,zero,e32,m2,ta,ma
vmv.v.i v2,0
vmand.mm v0,v0,v1
vmerge.vvm v2,v2,v4,v0
vse32.v v2,0(a0)
ret
Use 256 bit vector, so remove XFAIL for 256 bits vector.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/bb-slp-43.c: Fix XPASS for RVV.
---
gcc/testsuite/gcc.dg/vect/bb-slp-43.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-43.c b/gcc/testsuite/gcc.dg/vect/bb-slp-43.c
index a65d9513c4d5..dad2d24262d3 100644
--- a/gcc/testsuite/gcc.dg/vect/bb-slp-43.c
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-43.c
@@ -14,4 +14,4 @@ f (int *restrict x, short *restrict y)
}
/* { dg-final { scan-tree-dump-not "mixed mask and nonmask" "slp2" } } */
-/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } xfail vect_variable_length } } } */
+/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } xfail { vect_variable_length && { ! vect256 } } } } } */
--
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