diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c
index 0622588fdb93c6890b0b1503eba4cbe7d80b18fb..ba56dda21ec49f5a708fb8c48463c25dd0a39045 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c
@@ -6,4 +6,4 @@ _Float16 test_soft_move (_Float16 a, _Float16 b)
     return b;
 }
 
-/* { dg-final { scan-assembler-not "fmv.h" } } */
+/* { dg-final { scan-assembler-not {\mfmv\.h\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c
index 3d37823fa4d1844ac5c7187f98dadff41fd28f5e..e1a841e205ffc1d83ab9cc160980488a64a8200e 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c
@@ -7,7 +7,7 @@ _Float16 test_soft_add (_Float16 a, _Float16 b)
     /* { dg-final { scan-assembler-times "call\t__extendhfsf2" 2 } } */
     return a + b;
     /* { dg-final { scan-assembler-not "call\t__addhf3" } } */
-    /* { dg-final { scan-assembler-times "fadd.s" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfadd\.s\M} 1 } } */
     /* { dg-final { scan-assembler-times "call\t__truncsfhf2" 1 } } */
 }
 
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c
index ecce364e3107007b1b7acdd5c25a33fddb7e6047..66c5a369424ac7152fad310f937e43c9d8b8e80e 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c
@@ -7,6 +7,6 @@ int test_soft_compare (_Float16 a, _Float16 b)
     /* { dg-final { scan-assembler-times "call\t__extendhfsf2" 2 } } */
     return a > b;
     /* { dg-final { scan-assembler-not "call\t__gthf2" } } */
-    /* { dg-final { scan-assembler-times "fgt.s" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfgt\.s\M} 1 } } */
 }
 
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c
index 98908dccbb381d19e6d0db83dd3508e5c671e02e..433945507110f26671d3550e7f9a531628529283 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c
@@ -3,6 +3,6 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-times "fmv.h" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfmv\.h\M} 1 } } */
     return b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c
index 58bfa6b419856872da7a1b3f9cd34453c285b2e2..3f9ecedb15c80d70edcd8a1de12f9e1e788b3fb3 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c
@@ -3,6 +3,6 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-times "fadd.h" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfadd\.h\M} 1 } } */
     return a + b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c
index 128b4e53f27cb16568e3b130fe1622b5384cb3a8..b70b7118bd4cceb8b1536cd2db323f7f967ff203 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c
@@ -3,6 +3,6 @@
 
 int foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-times "fgt.h" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfgt\.h\M} 1 } } */
     return a > b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c
index 631a049f52f5d12bf510e97823d8e65651631cbb..8fcc51bad55a5483df85f7edf30c0a825bc794ff 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c
@@ -3,7 +3,7 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fmv.h" } } */
-    /* { dg-final { scan-assembler-times "fmv.s" 1 } } */
+    /* { dg-final { scan-assembler-not {\mfmv\.h\M} } } */
+    /* { dg-final { scan-assembler-times {\mfmv\.s\M} 1 } } */
     return b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c
index 06c85eb797deec87b0ff2595adbbd8916cb77efd..f9b615ce3a0d55347258c56707418af6b46bf536 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c
@@ -3,7 +3,7 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fadd.h" } } */
-    /* { dg-final { scan-assembler-times "fadd.s" 1 } } */
+    /* { dg-final { scan-assembler-not {\mfadd\.h\M} } } */
+    /* { dg-final { scan-assembler-times {\mfadd\.s\M} 1 } } */
     return a + b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c
index 28960d602458bc7b826bd688cc04063800d7b218..2a35006cfafe33ea97390d5cce6a250c80530b13 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c
@@ -3,7 +3,7 @@
 
 int foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fgt.h" } } */
-    /* { dg-final { scan-assembler-times "fgt.s" 1 } } */
+    /* { dg-final { scan-assembler-not {\mfgt\.h\M} } } */
+    /* { dg-final { scan-assembler-times {\mfgt\.s\M} 1 } } */
     return a > b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
index fa049db5b93254f00a2b402c86f72fafd605cc64..4c57890afd0c2f1bf6b40108159dc772569cc43f 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
@@ -3,8 +3,8 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fmv.h" } } */
-    /* { dg-final { scan-assembler-not "fmv.s" } } */
+    /* { dg-final { scan-assembler-not {\mfmv\.h\M} } } */
+    /* { dg-final { scan-assembler-not {\mfmv\.s\M} } } */
     /* { dg-final { scan-assembler-times "mv\ta0" 1 } } */
     return b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c
index 17f45a938d55f212c5c52b161107bced2c4bf204..31aa40d7e8e5b39000659d57f4b0c66580176139 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c
@@ -3,7 +3,7 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fadd.h" } } */
+    /* { dg-final { scan-assembler-not {\mfadd\.h\M} } } */
     /* { dg-final { scan-assembler-not "fadd.s	fa" } } */
     /* { dg-final { scan-assembler-times "fadd.s	a" 1 } } */
     return a + b;
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c
index 939b37873836b5bf10f5df87885cd5bed20e147b..230c0229413d0e71801585a2d89302f114730ddf 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c
@@ -3,7 +3,7 @@
 
 int foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fgt.h" } } */
+    /* { dg-final { scan-assembler-not {\mfgt\.h\M} } } */
     /* { dg-final { scan-assembler-not "fgt.s	fa" } } */
     /* { dg-final { scan-assembler-times "fgt.s	a" 1 } } */
     return a > b;
diff --git a/gcc/testsuite/gcc.target/riscv/and-extend-1.c b/gcc/testsuite/gcc.target/riscv/and-extend-1.c
index a270d28737401eb2f3c3dc632076922b6f4304a6..2fe4da3e4c50d1f2843121d2fdb1b0a7ac25cdf1 100644
--- a/gcc/testsuite/gcc.target/riscv/and-extend-1.c
+++ b/gcc/testsuite/gcc.target/riscv/and-extend-1.c
@@ -23,8 +23,8 @@ foo3(unsigned int a, unsigned int* ptr)
     ptr[1] &= 0xffff;
 }
 
-/* { dg-final { scan-assembler-times "zext.w" 1 } } */
-/* { dg-final { scan-assembler-times "zext.h" 2 } } */
-/* { dg-final { scan-assembler-times "lwu" 1 } } */
-/* { dg-final { scan-assembler-times "lhu" 2 } } */
+/* { dg-final { scan-assembler-times {\mzext\.w\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mzext\.h\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mlwu} 1 } } */
+/* { dg-final { scan-assembler-times {\mlhu} 2 } } */
 /* { dg-final { scan-assembler-not "and\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/and-extend-2.c b/gcc/testsuite/gcc.target/riscv/and-extend-2.c
index fe639cd1e821b07978a93dc0cdb0573106c1583a..e5a9cf62351e5ecdbf8b7410731faaef1edccd92 100644
--- a/gcc/testsuite/gcc.target/riscv/and-extend-2.c
+++ b/gcc/testsuite/gcc.target/riscv/and-extend-2.c
@@ -23,6 +23,6 @@ foo3(unsigned int a, unsigned int* ptr)
     ptr[1] &= 0xffff;
 }
 
-/* { dg-final { scan-assembler-times "zext.h" 2 } } */
-/* { dg-final { scan-assembler-times "lhu" 2 } } */
+/* { dg-final { scan-assembler-times {\mzext\.h\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mlhu} 2 } } */
 /* { dg-final { scan-assembler-not "and\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fle-ieee.c b/gcc/testsuite/gcc.target/riscv/fle-ieee.c
index af9d503b1ecced232ec1a2c22f6c6977a2f7cf64..e55331f925d6c484d57dc884250fd7d8f498c572 100644
--- a/gcc/testsuite/gcc.target/riscv/fle-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/fle-ieee.c
@@ -9,4 +9,4 @@ fle (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.d\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fle-snan.c b/gcc/testsuite/gcc.target/riscv/fle-snan.c
index 0579d93109b30a54bf3d3e2b80f6ddd489e20c27..f40bb2cbf66291548d9fef21f8246430ab2a3855 100644
--- a/gcc/testsuite/gcc.target/riscv/fle-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fle-snan.c
@@ -9,4 +9,4 @@ fle (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.d\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.d\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flef-ieee.c b/gcc/testsuite/gcc.target/riscv/flef-ieee.c
index e2d6b0d91b552ff5a0e2d40b46518c552ab69768..f3e7e7d75d6ce6cd156d9fbca1a5bb54fb5ac190 100644
--- a/gcc/testsuite/gcc.target/riscv/flef-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/flef-ieee.c
@@ -9,4 +9,4 @@ flef (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.s\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flef-snan.c b/gcc/testsuite/gcc.target/riscv/flef-snan.c
index 2d2c5b9e79f8eb663ca7347ab1512827d3d38b3d..ef75b3523057094e77ffff927a1bc0b1602b56b0 100644
--- a/gcc/testsuite/gcc.target/riscv/flef-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/flef-snan.c
@@ -9,4 +9,4 @@ flef (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.s\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.s\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flt-ieee.c b/gcc/testsuite/gcc.target/riscv/flt-ieee.c
index 7d7aae303e6ccc919801808ec329a7502f21b51e..c40a0fc11806e009f10d73183962234a09ba1db2 100644
--- a/gcc/testsuite/gcc.target/riscv/flt-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/flt-ieee.c
@@ -9,4 +9,4 @@ flt (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.d\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flt-snan.c b/gcc/testsuite/gcc.target/riscv/flt-snan.c
index ff4c4e9ac8d88ff96e84d27bb4fbcf018dac4ab6..c958ec01842277b6cd23523dea16db390f468d69 100644
--- a/gcc/testsuite/gcc.target/riscv/flt-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/flt-snan.c
@@ -9,4 +9,4 @@ flt (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.d\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.d\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fltf-ieee.c b/gcc/testsuite/gcc.target/riscv/fltf-ieee.c
index ede076eea360e5a982f894dd1fb5a1574b50459e..a9c0805037e6dd8fecf6738aa37eee136ca6f34a 100644
--- a/gcc/testsuite/gcc.target/riscv/fltf-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/fltf-ieee.c
@@ -9,4 +9,4 @@ fltf (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.s\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fltf-snan.c b/gcc/testsuite/gcc.target/riscv/fltf-snan.c
index d29d786f7f054050fc4ae2858b1ff9bf57ff09a0..34a51e3e800a492aa242dc30cde5a62f78f66e3d 100644
--- a/gcc/testsuite/gcc.target/riscv/fltf-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fltf-snan.c
@@ -9,4 +9,4 @@ fltf (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.s\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.s\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-1.c b/gcc/testsuite/gcc.target/riscv/interrupt-1.c
index d85eb980e16e6389b4f5ba122ea798de90729aa6..506aef4adc430d3eb8178dd42e8df55a004b75c2 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-1.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-1.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "mret" } } */
+/* { dg-final { scan-assembler {\mmret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c b/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c
index 50d54a0cf3402ebc1e87dc97cc1f56c814a30aad..7b7f0a7a7c680834c24f826c898653e452170a4c 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt ("machine")))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "mret" } } */
+/* { dg-final { scan-assembler {\mmret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-smode.c b/gcc/testsuite/gcc.target/riscv/interrupt-smode.c
index 973a9b1cac54818b94c5ead9e57d9b91c89279cf..ef0e59b4597782f2816ae402f82c65b05d0c5b4f 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-smode.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-smode.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt ("supervisor")))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "sret" } } */
+/* { dg-final { scan-assembler {\msret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-umode.c b/gcc/testsuite/gcc.target/riscv/interrupt-umode.c
index 7fcef755b0c79c6215cfa85864c861c813125239..042abf02ad292ee44d68c5133df58ff251ccc2a9 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-umode.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-umode.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt ("user")))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "uret" } } */
+/* { dg-final { scan-assembler {\muret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/pr106888.c b/gcc/testsuite/gcc.target/riscv/pr106888.c
index 77fb8e5b79c6bcc97ba3692cde3582911d38c7db..739d5d7e5efeefcdb1c072ae6e56cc437916ffeb 100644
--- a/gcc/testsuite/gcc.target/riscv/pr106888.c
+++ b/gcc/testsuite/gcc.target/riscv/pr106888.c
@@ -8,5 +8,5 @@ ctz (int i)
   return res&0xffff;
 }
 
-/* { dg-final { scan-assembler-times "ctzw" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-times {\mctzw} 1 } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/pr108987.c b/gcc/testsuite/gcc.target/riscv/pr108987.c
index 6179c7e13a4516ab96674d6dec6e0360f451d824..be9cd92dbfad5815593e6afe69ea80e91d37e2e9 100644
--- a/gcc/testsuite/gcc.target/riscv/pr108987.c
+++ b/gcc/testsuite/gcc.target/riscv/pr108987.c
@@ -6,4 +6,4 @@ unsigned long long f5(unsigned long long i)
   return i * 0x0202020202020202ULL;
 }
 
-/* { dg-final { scan-assembler-times "mul" 1 } } */
+/* { dg-final { scan-assembler-times {\mmul} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/pr89835.c b/gcc/testsuite/gcc.target/riscv/pr89835.c
index ab190e11b6080ffa69c972645a80669ea6bad7db..b7adc7c54f8f0a4291cd63c11a750360edcca200 100644
--- a/gcc/testsuite/gcc.target/riscv/pr89835.c
+++ b/gcc/testsuite/gcc.target/riscv/pr89835.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* Verify that relaxed atomic stores use simple store instuctions.  */
-/* { dg-final { scan-assembler-not "amoswap" } } */
+/* { dg-final { scan-assembler-not {\mamoswap} } } */
 
 void
 foo(int bar, int baz)
diff --git a/gcc/testsuite/gcc.target/riscv/ret-1.c b/gcc/testsuite/gcc.target/riscv/ret-1.c
index 28133aa4226eedbef6e5de9aa39db4d62af8db5b..92795958f5c9e483d6450f9df497033f89af8d10 100644
--- a/gcc/testsuite/gcc.target/riscv/ret-1.c
+++ b/gcc/testsuite/gcc.target/riscv/ret-1.c
@@ -37,5 +37,5 @@ core_list_find(list_head *list, list_data *info)
 /* There is only one legitimate unconditional jump, so test for that,
    which will catch the case where bb-reorder leaves a jump to a ret
    in the IL.  */
-/* { dg-final { scan-assembler-times "jump" 1 } } */
+/* { dg-final { scan-assembler-times {\mjump} 1 } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c
index 14201e1f7e0659b9c84f5d15223b339cebeedf63..64007ee67997b1a3085f29df1a6094bc6f6cd483 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c
@@ -8,5 +8,5 @@ f (int * __restrict dst, int * __restrict op1, int * __restrict op2, int count)
     dst[i] = op1[i] + op2[i];
 }
 
-/* { dg-final { scan-assembler-not "lw" } } */
-/* { dg-final { scan-assembler-not "sw" } } */
+/* { dg-final { scan-assembler-not {\mlw} } } */
+/* { dg-final { scan-assembler-not {\msw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c
index 812584e9d25f12939bf0d03dd22d2ba9e4901b0c..a82f34e0464c79e15dfaed1e4e5bcdd9666b331f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c
@@ -8,5 +8,5 @@ f (int * __restrict dst, int * __restrict op1, int * __restrict op2, int count)
     dst[i] = op1[i] + op2[i];
 }
 
-/* { dg-final { scan-assembler-not "lw" } } */
-/* { dg-final { scan-assembler-not "sw" } } */
+/* { dg-final { scan-assembler-not {\mlw} } } */
+/* { dg-final { scan-assembler-not {\msw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-and-1.c b/gcc/testsuite/gcc.target/riscv/shift-and-1.c
index 429ab84f9df6c8c99d9b4c6025b4b6de58be88f9..2d483d06baa8b84af5941a71880d0193b454b660 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-and-1.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-and-1.c
@@ -8,4 +8,4 @@ sub1 (int i, int j)
 {
   return i << (j & 0x1f);
 }
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-and-2.c b/gcc/testsuite/gcc.target/riscv/shift-and-2.c
index ee9925b749859950bd90de07aa63680bd3d8a5f2..9b4ca11fcbabbb534d70c8b082288d2dce0d7e22 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-and-2.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-and-2.c
@@ -57,5 +57,5 @@ sub9 (unsigned i, unsigned j) {
   return (i >> 10) & j;
 }
 
-/* { dg-final { scan-assembler-not "andi" } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-1.c b/gcc/testsuite/gcc.target/riscv/shift-shift-1.c
index 462e532e1f1e07a60eeaae00c913a18313158f29..bae6c8a40168a1278e9f23cdde4d2ad43d7b6e75 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-1.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-1.c
@@ -14,5 +14,5 @@ sub2 (unsigned int i)
 {
   return (i << 20) >> 20;
 }
-/* { dg-final { scan-assembler-times "slli" 2 } } */
-/* { dg-final { scan-assembler-times "srli" 2 } } */
+/* { dg-final { scan-assembler-times {\mslli} 2 } } */
+/* { dg-final { scan-assembler-times {\msrli} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-2.c b/gcc/testsuite/gcc.target/riscv/shift-shift-2.c
index bc8c4ef382897d849697e525986c4cdfa82f3699..3b0c9d5dfb4d579b75c12ba1dbc80519b4982db4 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-2.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-2.c
@@ -36,8 +36,8 @@ sub5 (unsigned int i)
   j = i - j;
   return j;
 }
-/* { dg-final { scan-assembler-times "slli" 5 } } */
-/* { dg-final { scan-assembler-times "srli" 5 } } */
+/* { dg-final { scan-assembler-times {\mslli} 5 } } */
+/* { dg-final { scan-assembler-times {\msrli} 5 } } */
 /* { dg-final { scan-assembler-times ",40" 2 } } */ /* For sub5 test */
-/* { dg-final { scan-assembler-not "slliw" } } */
-/* { dg-final { scan-assembler-not "srliw" } } */
+/* { dg-final { scan-assembler-not {\mslliw} } } */
+/* { dg-final { scan-assembler-not {\msrliw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-3.c b/gcc/testsuite/gcc.target/riscv/shift-shift-3.c
index 16999b02796c10f92fe454bf2d0faf65226444af..d9154a12c58905649173a0ebe196df38f5d37416 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-3.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-3.c
@@ -15,5 +15,5 @@ sub2 (unsigned long i)
 {
   return (i >> 63) << 63;
 }
-/* { dg-final { scan-assembler-times "slli" 2 } } */
-/* { dg-final { scan-assembler-times "srli" 2 } } */
+/* { dg-final { scan-assembler-times {\mslli} 2 } } */
+/* { dg-final { scan-assembler-times {\msrli} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-4.c b/gcc/testsuite/gcc.target/riscv/shift-shift-4.c
index bc7bca10e6f3757ee659e24049d03727b2963be0..c479649a185349bf4c2ad7da3ff565a721e88785 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-4.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-4.c
@@ -11,4 +11,4 @@ sub (int i)
   i &= 0x7fffffff;
   return i > 0x7f800000;
 }
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-5.c b/gcc/testsuite/gcc.target/riscv/shift-shift-5.c
index ed8e7b3f1cb19f2ed50db4eb440d890ea1a9732b..d012866c2adc15b6ff9d98a43cd28ab43b323d05 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-5.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-5.c
@@ -18,4 +18,4 @@ sub (long l)
   u.l = l;
   return u.s.b;
 }
-/* { dg-final { scan-assembler "srliw" } } */
+/* { dg-final { scan-assembler {\msrliw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c
index 476d079679fe8287d2653eaa3a28dd6bb43249a0..ba7b783e8d288f6dabc2e835c91fb99c82919924 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c
@@ -44,4 +44,4 @@ load2r (long long *array)
   return a;
 }
 
-/* { dg-final { scan-assembler-not "addi" } } */
+/* { dg-final { scan-assembler-not {\maddi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sign-extend.c b/gcc/testsuite/gcc.target/riscv/sign-extend.c
index 6f8401948330d7772dce2fe5ae1399696896a534..47be57dc88ece3691b44a3772fb91e1736507e4d 100644
--- a/gcc/testsuite/gcc.target/riscv/sign-extend.c
+++ b/gcc/testsuite/gcc.target/riscv/sign-extend.c
@@ -69,13 +69,13 @@ foo11 (unsigned x)
   return x & (15 + x);
 }
 
-/* { dg-final { scan-assembler-times "subw" 2 } } */
-/* { dg-final { scan-assembler-times "addw" 1 } } */
-/* { dg-final { scan-assembler-times "addiw" 1 } } */
-/* { dg-final { scan-assembler-times "mulw" 2 } } */
-/* { dg-final { scan-assembler-times "divw" 1 } } */
-/* { dg-final { scan-assembler-times "divuw" 1 } } */
-/* { dg-final { scan-assembler-times "remw" 1 } } */
-/* { dg-final { scan-assembler-times "remuw" 1 } } */
-/* { dg-final { scan-assembler-times "negw" 1 } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-times {\msubw} 2 } } */
+/* { dg-final { scan-assembler-times {\maddw} 1 } } */
+/* { dg-final { scan-assembler-times {\maddiw} 1 } } */
+/* { dg-final { scan-assembler-times {\mmulw} 2 } } */
+/* { dg-final { scan-assembler-times {\mdivw} 1 } } */
+/* { dg-final { scan-assembler-times {\mdivuw} 1 } } */
+/* { dg-final { scan-assembler-times {\mremw} 1 } } */
+/* { dg-final { scan-assembler-times {\mremuw} 1 } } */
+/* { dg-final { scan-assembler-times {\mnegw} 1 } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/switch-qi.c b/gcc/testsuite/gcc.target/riscv/switch-qi.c
index e39219bea363db384833603b7c9842812a0c5b4d..9126e0a10b205f3a5eb5350b6a54155334a960d0 100644
--- a/gcc/testsuite/gcc.target/riscv/switch-qi.c
+++ b/gcc/testsuite/gcc.target/riscv/switch-qi.c
@@ -12,4 +12,4 @@ void foo(signed char x) {
   case 4: asdf(14); break;
   }
 }
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/switch-si.c b/gcc/testsuite/gcc.target/riscv/switch-si.c
index c68f98d04e6c1ec17693c5797aff5c60826244f7..e76c2aa088d08af475b17a34faf44082f4f3461b 100644
--- a/gcc/testsuite/gcc.target/riscv/switch-si.c
+++ b/gcc/testsuite/gcc.target/riscv/switch-si.c
@@ -12,4 +12,4 @@ void foo(int x) {
   case 4: asdf(14); break;
   }
 }
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c
index 02f6ec1417de014b53f59db2e79c6dd6fc2766d4..04b823210455d1abe9017aac5979a21f54656716 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c
@@ -63,5 +63,5 @@ char sext8_16(short s16)
     return s16;
 }
 
-/* { dg-final { scan-assembler-not "slli" } } */
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\mslli} } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c
index 60fb7d44e39e51b904edb975a22c195fb65a664b..121d9697d71418b2cd2a8a772ea85be66e1f9f80 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c
@@ -17,4 +17,4 @@ foo (struct bar *s)
 }
 
 /* { dg-final { scan-assembler "th.ext\t" } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c
index 01e3eda7df2f6e2d374559cb49fb2fe936d095d4..b92445c513260ed271c17894ae5e84908b415e18 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c
@@ -63,5 +63,5 @@ unsigned char zext8_16(unsigned short u16)
     return u16;
 }
 
-/* { dg-final { scan-assembler-not "slli" } } */
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\mslli} } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c
index e0492f1f5adc2390c7afbd8c1cb6224c5a02bd0b..fca9b7e438a2cad0fd2b8dd3e0ce38479ca350b8 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c
@@ -17,6 +17,6 @@ foo (struct bar *s)
 }
 
 /* { dg-final { scan-assembler "th.extu\t" } } */
-/* { dg-final { scan-assembler-not "andi" } } */
-/* { dg-final { scan-assembler-not "slli" } } */
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
+/* { dg-final { scan-assembler-not {\mslli} } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c
index dbc8d1e7da7d108eff765bf2cfdecf917f13339a..f243b6f1f4fd9dce6995fff572ae1f38965f7890 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c
@@ -13,7 +13,7 @@ my_str_len (const char *s)
 }
 
 /* { dg-final { scan-assembler "th.tstnbz\t" } } */
-/* { dg-final { scan-assembler-not "jalr" } } */
-/* { dg-final { scan-assembler-not "call" } } */
-/* { dg-final { scan-assembler-not "jr" } } */
-/* { dg-final { scan-assembler-not "tail" } } */
+/* { dg-final { scan-assembler-not {\mjalr} } } */
+/* { dg-final { scan-assembler-not {\mcall} } } */
+/* { dg-final { scan-assembler-not {\mjr} } } */
+/* { dg-final { scan-assembler-not {\mtail} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c b/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c
index 674cec09128a668a5c871a05ad2ae4d025172824..f56d9ad344c909fb318f4d588c900e7d06980b42 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c
@@ -10,4 +10,4 @@ foo1 (long i)
 }
 
 /* { dg-final { scan-assembler-times "th.tst\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c b/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c
index 89eb48bed1b99b662dab29a87298685d40bb2484..9b4e2378448058c413ff1fbc6d1843deb35526e0 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c
@@ -14,9 +14,9 @@ d2ll (double d)
   return *(long long*)&d;
 }
 
-/* { dg-final { scan-assembler "fmv.w.x" } } */
+/* { dg-final { scan-assembler {\mfmv\.w.x\M} } } */
 /* { dg-final { scan-assembler "th.fmv.hw.x" } } */
-/* { dg-final { scan-assembler "fmv.x.w" } } */
+/* { dg-final { scan-assembler {\mfmv\.x.w\M} } } */
 /* { dg-final { scan-assembler "th.fmv.x.hw" } } */
 /* { dg-final { scan-assembler-not "\tsw\t" } } */
 /* { dg-final { scan-assembler-not "\tfld\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c b/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
index 644ca12d647017162d9408bddfd8289917fa526d..19bbcb6a5dfdd5ae95149bc350fb02f0c1b101ba 100644
--- a/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
+++ b/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
@@ -6,5 +6,5 @@
 
 /* { dg-final { scan-assembler-times "vt\\.maskc\t" 6 } } */
 /* { dg-final { scan-assembler-times "vt\\.maskcn\t" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-adduw.c b/gcc/testsuite/gcc.target/riscv/zba-adduw.c
index 2ae03aee859d4d8135681b483b15e521d1245a30..a15ad7f9a55eb36eb4039c2c0e3db993f65e6f5e 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-adduw.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-adduw.c
@@ -10,4 +10,4 @@ int foo(int n, unsigned char *arr, unsigned y){
   return s;
 }
 
-/* { dg-final { scan-assembler "add.uw" } } */
+/* { dg-final { scan-assembler {\madd\.uw\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c
index bc97bc74539e57af736b0392bbf76676ead58b29..34dfd0ce9c74c572d839fcb971e6d8409dae8427 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c
@@ -15,6 +15,6 @@ long test_3(long a, long b)
   return a + (b << 3);
 }
 
-/* { dg-final { scan-assembler-times "sh1add" 1 } } */
-/* { dg-final { scan-assembler-times "sh2add" 1 } } */
-/* { dg-final { scan-assembler-times "sh3add" 1 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh2add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh3add} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c
index 5f4b65f2d225c0f1fe810eca63e1649460e6214c..c40f2cb8d1e3e2f101ec23352c0de5168c2ab24f 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c
@@ -15,6 +15,6 @@ long test_3(long a, long b)
   return a + (b << 3);
 }
 
-/* { dg-final { scan-assembler-times "sh1add" 1 } } */
-/* { dg-final { scan-assembler-times "sh2add" 1 } } */
-/* { dg-final { scan-assembler-times "sh3add" 1 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh2add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh3add} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c
index abed1491039707da41e94cd3c1cda58dc98b6933..48e225d3f1e7286a68351de1d7ba4a051d5185e6 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c
@@ -19,5 +19,5 @@ long long sub3(unsigned long long a, unsigned long long b)
   return (a + (b << 1)) & ~0u;
 }
 
-/* { dg-final { scan-assembler-times "sh1add" 3 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 3 } } */
 /* { dg-final { scan-assembler-times "zext.w\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c
index 93da241c9b60e4fa6f70c806f1e3a815f90f20c1..cd48664a4cd6bc815894127aded8d946e1166181 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c
@@ -25,7 +25,7 @@ f4 (unsigned long i)
   return i * 1574;
 }
 
-/* { dg-final { scan-assembler-times "sh2add" 2 } } */
-/* { dg-final { scan-assembler-times "sh1add" 1 } } */
-/* { dg-final { scan-assembler-times "slli" 3 } } */
-/* { dg-final { scan-assembler-times "mul" 2 } } */
+/* { dg-final { scan-assembler-times {\msh2add} 2 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 1 } } */
+/* { dg-final { scan-assembler-times {\mslli} 3 } } */
+/* { dg-final { scan-assembler-times {\mmul} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shadd.c b/gcc/testsuite/gcc.target/riscv/zba-shadd.c
index 33da2530f3f5fd178aeda87708e9464c19d5932a..61305d3a357d8e9caf7531ddd949e626b235d48e 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shadd.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shadd.c
@@ -10,4 +10,4 @@ unsigned long foo(unsigned int a, unsigned long b)
 }
 
 /* { dg-final { scan-assembler "sh2add.uw" } } */
-/* { dg-final { scan-assembler-not "zext" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not {\mzext} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-slliuw.c b/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
index cd3cf0eabc4e590b222ab309abf39e7a4ca11c05..c123bb5ece0f772d435a675712b0b5fa0419a44b 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
@@ -9,4 +9,4 @@ foo (long i)
 }
 /* XXX: This pattern need combine improvement or intermediate instruction
  *      from zbs.   */
-/* { dg-final { scan-assembler "slli.uw" } } */
+/* { dg-final { scan-assembler {\mslli\.uw\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-zextw.c b/gcc/testsuite/gcc.target/riscv/zba-zextw.c
index 271c186ad6d5345617dc157f7f143b77d2c0e3c7..7da2a943b85b8b97f97d9b3018b96bda624fbbff 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-zextw.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-zextw.c
@@ -8,4 +8,4 @@ foo (long i)
   return (long)(unsigned int)i;
 }
 /* XXX: This pattern require combine improvement.   */
-/* { dg-final { scan-assembler-not "slli.uw" } } */
+/* { dg-final { scan-assembler-not {\mslli\.uw\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c
index 89a30431ef1691594501fe1844797a2aa7e04325..a1f5f03cfc224ef0fb4d4b2d053fe0662c043953 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c
@@ -17,6 +17,6 @@ unsigned long long foo3(unsigned long long rs1, unsigned long long rs2)
 return rs1 ^ ~rs2;
 }
 
-/* { dg-final { scan-assembler-times "andn" 2 } } */
-/* { dg-final { scan-assembler-times "orn" 2 } } */
-/* { dg-final { scan-assembler-times "xnor" 2 } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mandn} 2 } } */
+/* { dg-final { scan-assembler-times {\morn} 2 } } */
+/* { dg-final { scan-assembler-times {\mxnor} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c
index ef0dade47e6f4a139501c721bea896b7abdd9d2a..331bd332a56d9b9af28cf44edb3ac3cbd3022d72 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c
@@ -17,6 +17,6 @@ unsigned int foo3(unsigned int rs1, unsigned int rs2)
 return rs1 ^ ~rs2;
 }
 
-/* { dg-final { scan-assembler-times "andn" 2 } } */
-/* { dg-final { scan-assembler-times "orn" 2 } } */
-/* { dg-final { scan-assembler-times "xnor" 2 } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mandn} 2 } } */
+/* { dg-final { scan-assembler-times {\morn} 2 } } */
+/* { dg-final { scan-assembler-times {\mxnor} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c
index edfbf807d450f0779e776e35ea557f552be5aa5a..22bfb93ddddcbe3b9b2b27d0e1ec613699d8b7e9 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c
@@ -8,7 +8,7 @@ int f(unsigned int* a)
   return *a * 3 > C ? C : *a * 3;
 }
 
-/* { dg-final { scan-assembler-times "minu" 1 } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
-/* { dg-final { scan-assembler-not "zext.w" } } */
+/* { dg-final { scan-assembler-times {\mminu} 1 } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
+/* { dg-final { scan-assembler-not {\mzext\.w\M} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
index 38c932b9580065722c411a1f8e7cabedc3f9659d..769e876ced7a81fb0e099e27653ae82b7ff0ad92 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
@@ -18,6 +18,6 @@ unsigned f3(unsigned x, unsigned y) {
 /* { dg-final { scan-assembler-not "li\t" } } */
 /* { dg-final { scan-assembler-times "maxu\t" 1 } } */
 /* { dg-final { scan-assembler-times "minu\t" 1 } } */
-/* { dg-final { scan-assembler-not "zext.w" } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-not {\mzext\.w\M} } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max.c
index ce054ddb37f253cd2802ed2a61218c219bb3be21..2a5d9349b464802749927c303dc0fc86f839f9d2 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-min-max.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max.c
@@ -26,7 +26,7 @@ foo4 (unsigned long i, unsigned long j)
   return i > j ? i : j;
 }
 
-/* { dg-final { scan-assembler-times "min" 3 } } */
-/* { dg-final { scan-assembler-times "max" 3 } } */
-/* { dg-final { scan-assembler-times "minu" 1 } } */
-/* { dg-final { scan-assembler-times "maxu" 1 } } */
+/* { dg-final { scan-assembler-times {\mmin} 3 } } */
+/* { dg-final { scan-assembler-times {\mmax} 3 } } */
+/* { dg-final { scan-assembler-times {\mminu} 1 } } */
+/* { dg-final { scan-assembler-times {\mmaxu} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c
index 0a5b5e12eb2a6f4d5fd8b800231c2261c2ede542..4f2ff7f54e644e7ea115e577fd7dede375ba1f96 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c
@@ -13,6 +13,6 @@ unsigned long foo2(unsigned long rs1, unsigned long rs2)
     return (rs1 >> shamt) | (rs1 << ((64 - shamt) & (64 - 1)));
 }
 
-/* { dg-final { scan-assembler-times "rol" 2 } } */
-/* { dg-final { scan-assembler-times "ror" 2 } } */
-/* { dg-final { scan-assembler-not "and" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mrol} 2 } } */
+/* { dg-final { scan-assembler-times {\mror} 2 } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c
index d0d5813580922ca45b8dab28a4ce4f200bfd3320..c24809234b6020fa7e6923170860411a3ead6b5c 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c
@@ -13,6 +13,6 @@ unsigned int foo2(unsigned int rs1, unsigned int rs2)
     return (rs1 >> shamt) | (rs1 << ((32 - shamt) & (32 - 1)));
 }
 
-/* { dg-final { scan-assembler-times "rol" 2 } } */
-/* { dg-final { scan-assembler-times "ror" 2 } } */
-/* { dg-final { scan-assembler-not {and} { target { no-opts "-O0" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mrol} 2 } } */
+/* { dg-final { scan-assembler-times {\mror} 2 } } */
+/* { dg-final { scan-assembler-not {and} { target { no-opts "-O0" } } } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c
index e7e5cbb9a1ab7b0af5b85c71fd4e2bd56aca3c00..f85c20eb74ad37df385a84ae27b1bf9a4c9662d1 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c
@@ -14,7 +14,7 @@ unsigned int ror(unsigned int rs1, unsigned int rs2)
     return (rs1 >> shamt) | (rs1 << ((32 - shamt) & (32 - 1)));
 }
 
-/* { dg-final { scan-assembler-times "rolw" 1 } } */
-/* { dg-final { scan-assembler-times "rorw" 1 } } */
-/* { dg-final { scan-assembler-not "and" } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-times {\mrolw} 1 } } */
+/* { dg-final { scan-assembler-times {\mrorw} 1 } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
index 7ef4c29dd5b5a74fc2ac6db5859fc205cbcf479f..28350e5e93717837ea1f7f545a35c97a0f7c2193 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
index 2108ccc3e779da380b5b6ddc72d58285c49b1844..cc44653acfbd75fe2d59d307f273a6db471fb593 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gc_zbb -mabi=ilp32 -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c
index 8c0711d6f9481ec40bc0f385e4a8cf8e3b2dbde7..7a98a5712bfe89e2625b3268cd1fd9b15e40de2b 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
@@ -34,4 +34,4 @@ unsigned int foo3 (unsigned int rs1)
 **	ret
 */
 unsigned int foo4 (unsigned int rs1)
-{ return ((rs1 << 18) | (rs1 >> 14)); }
\ No newline at end of file
+{ return ((rs1 << 18) | (rs1 >> 14)); }
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c
index bda3f0e474d5b51d11136b60db7205568510e66c..a08a9eb772e221eec3455e93205bfc1ce7076249 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
@@ -62,4 +62,4 @@ unsigned long foo4 (unsigned long rs1)
     tempt = tempt << 6;
     rs1 = tempt | (rs1 >> 20);
     return rs1 ; 
-}
\ No newline at end of file
+}
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
index 30696f3bb32fc338e5f29576479202c173c48b36..bf19b76b431dce69e781edd3984b3fcb2f1a6463 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
index a3054553e18493136cdf5a679e0e4ec946edb35c..5c4b9f58de134cc609606aad207436d296c913f9 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gc_zbb -mabi=ilp32 -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-strlen.c b/gcc/testsuite/gcc.target/riscv/zbb-strlen.c
index 19ebfaef16f6e2179843b340cd4ef02150c6e217..267ee414a443dd56b3e0eac6423b5c4dfb4040a1 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-strlen.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-strlen.c
@@ -13,7 +13,7 @@ my_str_len (const char *s)
 }
 
 /* { dg-final { scan-assembler "orc.b\t" } } */
-/* { dg-final { scan-assembler-not "jalr" } } */
-/* { dg-final { scan-assembler-not "call" } } */
-/* { dg-final { scan-assembler-not "jr" } } */
-/* { dg-final { scan-assembler-not "tail" } } */
+/* { dg-final { scan-assembler-not {\mjalr} } } */
+/* { dg-final { scan-assembler-not {\mcall} } } */
+/* { dg-final { scan-assembler-not {\mjr} } } */
+/* { dg-final { scan-assembler-not {\mtail} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
index 3ff7d9de40951f690b743e508d2dbd4a58b47048..789dda17f05cd18296c722de17f37adbeba305b6 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
@@ -7,5 +7,5 @@ int foo(int n)
   return __builtin_bswap32(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
index 679b34c4e411f7a9009e92f2105ba72a0f59f349..3b8462d7feba276d625ac3a944573a4c2c5e3b08 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
@@ -7,6 +7,6 @@ int foo(int n)
   return __builtin_bswap16(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
-/* { dg-final { scan-assembler "srli" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
+/* { dg-final { scan-assembler {\msrli} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
index 20feded0df2ef55ed5fb3eef7825c35fe30694a9..158d97bc6e64cae823fa7ddf4a7e76a8bc1edcc5 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
@@ -7,5 +7,5 @@ int foo(int n)
   return __builtin_bswap32(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c b/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
index c358f6683f33330f06289682218c5e79a11dbdab..cb81f981ee38f1b4d0cb4906e50695abed1585ad 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
@@ -7,6 +7,6 @@ int foo(int n)
   return __builtin_bswap16(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
-/* { dg-final { scan-assembler "srli" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
+/* { dg-final { scan-assembler {\msrli} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbbw.c b/gcc/testsuite/gcc.target/riscv/zbbw.c
index f7b2b63853f4092138c4db82bb50cbbb01ec3cb1..bdf6b0c4ec5605f8f1104110b594156f195a6620 100644
--- a/gcc/testsuite/gcc.target/riscv/zbbw.c
+++ b/gcc/testsuite/gcc.target/riscv/zbbw.c
@@ -20,7 +20,7 @@ popcount (int i)
 }
 
 
-/* { dg-final { scan-assembler-times "clzw" 1 } } */
-/* { dg-final { scan-assembler-times "ctzw" 1 } } */
-/* { dg-final { scan-assembler-times "cpopw" 1 } } */
+/* { dg-final { scan-assembler-times {\mclzw} 1 } } */
+/* { dg-final { scan-assembler-times {\mctzw} 1 } } */
+/* { dg-final { scan-assembler-times {\mcpopw} 1 } } */
 /* { dg-final { scan-assembler-not "andi\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbc32.c b/gcc/testsuite/gcc.target/riscv/zbc32.c
index f3fb2238f7f477c280bf474480e108ac74b55c86..049ea95c56b31b5cfdfbcc454cd600fa013daf10 100644
--- a/gcc/testsuite/gcc.target/riscv/zbc32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbc32.c
@@ -19,5 +19,5 @@ uint32_t foo3(uint32_t rs1, uint32_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
-/* { dg-final { scan-assembler-times "clmulr" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulr} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbc64.c b/gcc/testsuite/gcc.target/riscv/zbc64.c
index 841a0aa7847dd2e382a77f9bf4f46d62a773c2de..69dadd1ca88a306b15f05cae37273580e1167788 100644
--- a/gcc/testsuite/gcc.target/riscv/zbc64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbc64.c
@@ -19,5 +19,5 @@ uint64_t foo3(uint64_t rs1, uint64_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
-/* { dg-final { scan-assembler-times "clmulr" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulr} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkb32.c b/gcc/testsuite/gcc.target/riscv/zbkb32.c
index b2e442dc49d8d002fdd0c57432ce795d4a1ec1d7..841f5e0d8e3298ad3c9780a4abf5a80f98fbd5a9 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkb32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkb32.c
@@ -30,7 +30,7 @@ uint32_t foo5(uint32_t rs1)
 }
 
 /* { dg-final { scan-assembler-times "pack\t" 1 } } */
-/* { dg-final { scan-assembler-times "packh" 1 } } */
-/* { dg-final { scan-assembler-times "brev8" 1 } } */
+/* { dg-final { scan-assembler-times {\mpackh} 1 } } */
+/* { dg-final { scan-assembler-times {\mbrev8} 1 } } */
 /* { dg-final { scan-assembler-times "\tzip\t" 1 } } */
-/* { dg-final { scan-assembler-times "unzip" 1 } } */
+/* { dg-final { scan-assembler-times {\munzip} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkb64.c b/gcc/testsuite/gcc.target/riscv/zbkb64.c
index 08ac9c2a9f00529f6163176cf2f790a86806f944..8b6a0bff1f2d9c4c9163638ca4ea67459002b284 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkb64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkb64.c
@@ -23,6 +23,6 @@ uint64_t foo4(uint64_t rs1, uint64_t rs2)
     return __builtin_riscv_brev8(rs1);
 }
 /* { dg-final { scan-assembler-times "pack\t" 1 } } */
-/* { dg-final { scan-assembler-times "packh" 1 } } */
-/* { dg-final { scan-assembler-times "packw" 1 } } */
-/* { dg-final { scan-assembler-times "brev8" 1 } } */
+/* { dg-final { scan-assembler-times {\mpackh} 1 } } */
+/* { dg-final { scan-assembler-times {\mpackw} 1 } } */
+/* { dg-final { scan-assembler-times {\mbrev8} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkc32.c b/gcc/testsuite/gcc.target/riscv/zbkc32.c
index 29f0d624a7d7d0e5b5371d79250e48c134029db2..6d2a8fffbc1a8a1bee7df82a794e48799184e433 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkc32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkc32.c
@@ -14,4 +14,4 @@ uint32_t foo2(uint32_t rs1, uint32_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkc64.c b/gcc/testsuite/gcc.target/riscv/zbkc64.c
index 53e6ac215ed30532b24ebb4801772ae361aa529f..3708fb5fbb11e5c0a6efe9ed4973458bd3ad4013 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkc64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkc64.c
@@ -14,4 +14,4 @@ uint64_t foo2(uint64_t rs1, uint64_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkx32.c b/gcc/testsuite/gcc.target/riscv/zbkx32.c
index b8b822a7c499cc2b4a104e8ac64399c37d1b7cde..b41fd90de5192d9cdd475b43516638c672888232 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkx32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkx32.c
@@ -14,5 +14,5 @@ uint32_t foo4(uint32_t rs1, uint32_t rs2)
     return __builtin_riscv_xperm4(rs1, rs2);
 }
 
-/* { dg-final { scan-assembler-times "xperm8" 1 } } */
-/* { dg-final { scan-assembler-times "xperm4" 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm8} 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm4} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkx64.c b/gcc/testsuite/gcc.target/riscv/zbkx64.c
index 732436701b338d520ec9465b59a2ef7ea863be7e..9ed42b407186cf58f1e05b4918baa50d49decdcb 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkx64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkx64.c
@@ -14,5 +14,5 @@ uint64_t foo2(uint64_t rs1, uint64_t rs2)
     return __builtin_riscv_xperm4(rs1, rs2);
 }
 
-/* { dg-final { scan-assembler-times "xperm8" 1 } } */
-/* { dg-final { scan-assembler-times "xperm4" 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm8} 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm4} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bclr.c b/gcc/testsuite/gcc.target/riscv/zbs-bclr.c
index 5d7daa3b82605ac04244b92c8960015f877ff22f..e37580dc245ff14dcc8f7b13663044669377c29e 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bclr.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bclr.c
@@ -18,4 +18,4 @@ foo1 (long i)
 
 /* { dg-final { scan-assembler-times "bclr\t" 1 } } */
 /* { dg-final { scan-assembler-times "bclri\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
index 3f3b8404eca5f204744932a319c245c56a76852f..8c5d8c7a41a76295981f040d285a94c982a6adc2 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
@@ -14,5 +14,5 @@ foo(const long long B, int a)
 }
 
 /* { dg-final { scan-assembler-times "bext\t" 1 } } */
-/* { dg-final { scan-assembler-not "bset" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mbset} } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bext.c b/gcc/testsuite/gcc.target/riscv/zbs-bext.c
index a8aadb60390994bfe4f52f2566881a27aa8971c5..ff75dad65285926c56df90e76512cb82aea5fa85 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bext.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bext.c
@@ -41,4 +41,4 @@ long bext64_4(long a, char bitno)
 /* { dg-final { scan-assembler-times "xori\t|snez\t" 1 } } */
 /* { dg-final { scan-assembler-times "addi\t" 1 } } */
 /* { dg-final { scan-assembler-times "neg\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-binv.c b/gcc/testsuite/gcc.target/riscv/zbs-binv.c
index d8d6e47f4356bb8768ca066106d319482fc6f9c9..f4bf27e9071f9e4f974e427c05780d594e648280 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-binv.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-binv.c
@@ -18,4 +18,4 @@ foo1 (long i)
 
 /* { dg-final { scan-assembler-times "binv\t" 1 } } */
 /* { dg-final { scan-assembler-times "binvi\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bset.c b/gcc/testsuite/gcc.target/riscv/zbs-bset.c
index cea2b64bafcf0a939d274a4d3dc8675e567a81cf..4a5b6f5cb578aeef7a56ebab2b1d3dd08217932d 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bset.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bset.c
@@ -39,4 +39,4 @@ sub4 (long i)
 
 /* { dg-final { scan-assembler-times "bset\t" 4 } } */
 /* { dg-final { scan-assembler-times "bseti\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-1.c b/gcc/testsuite/gcc.target/riscv/zero-extend-1.c
index b61ea8eff6b3ff9e437db2bd5b1fce90f5464087..754842feddde60426caa6015647735d3f7cb7055 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-1.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-1.c
@@ -5,4 +5,4 @@ sub1 (unsigned int i)
 {
   return i >> 1;
 }
-/* { dg-final { scan-assembler-times "srliw" 1 } } */
+/* { dg-final { scan-assembler-times {\msrliw} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-2.c b/gcc/testsuite/gcc.target/riscv/zero-extend-2.c
index c3d6eeb1f7d05d65b7731370b64e43ced08d822f..da48fe574632afa19195a19097429cc9ed655576 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-2.c
@@ -10,4 +10,4 @@ sub (unsigned int wc, unsigned long step, unsigned char *start)
     }
   while (step > 1);
 }
-/* { dg-final { scan-assembler-times "sext.w" 0 } } */
+/* { dg-final { scan-assembler-times {\msext\.w\M} 0 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-3.c b/gcc/testsuite/gcc.target/riscv/zero-extend-3.c
index 6485ebd5934447ed1d6a40fe47126dece7c1d423..c567300f4acce94fafc3ab11ee1f4c8c3e3379c6 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-3.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-3.c
@@ -9,4 +9,4 @@ c (void)
     d = b;
   return d;
 }
-/* { dg-final { scan-assembler-times "sext.w" 0 } } */
+/* { dg-final { scan-assembler-times {\msext\.w\M} 0 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-4.c b/gcc/testsuite/gcc.target/riscv/zero-extend-4.c
index e1a8922bb286259631599bc76fbb1e2038b69f7b..3c776b09d6e427550b5f0e5ec1b3faad69a203d2 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-4.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-4.c
@@ -18,4 +18,4 @@ f(void)
 	d->binmap[0] = e;
     }
 }
-/* { dg-final { scan-assembler-times "sext.w" 0 } } */
+/* { dg-final { scan-assembler-times {\msext\.w\M} 0 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-5.c b/gcc/testsuite/gcc.target/riscv/zero-extend-5.c
index 4e58a151f6282ccbbe658ceb7baf05e1a8478ed0..2f689614dcef07caafeb06e881d9245c00d5b5c6 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-5.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-5.c
@@ -5,4 +5,4 @@ sub (unsigned int i, unsigned int j, unsigned int k, int *array)
 {
   return array[i] + array[j] + array[k];
 }
-/* { dg-final { scan-assembler-times "slli" 3 } } */
+/* { dg-final { scan-assembler-times {\mslli} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c b/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c
index 9161dd3d4ec8b0c235bfa3014b2c7a689405a9d9..cf3dfac1949ba70215a754d79caa4ed875056726 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c
@@ -6,7 +6,7 @@ foo (void)
 {
 }
 
-/* { dg-final { scan-assembler-not "vsetvli" } } */
+/* { dg-final { scan-assembler-not {\mvsetvli} } } */
 /* { dg-final { scan-assembler "li\[ \t\]*t0,0" } } */
 /* { dg-final { scan-assembler "li\[ \t\]*t1,0" } } */
 /* { dg-final { scan-assembler "li\[ \t\]*t2,0" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c b/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c
index 7c28b0bcccc711f3aa44d7241fb64d1757031c2f..74777387f40657e5ad56f8ba61859ac2139dc96e 100644
--- a/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c
+++ b/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c
@@ -14,7 +14,7 @@ foo()
     abort();
 }
 
-/* { dg-final { scan-assembler-times "fleq.s" 1 } } */
-/* { dg-final { scan-assembler-times "fltq.s" 1 } } */
-/* { dg-final { scan-assembler-times "fleq.d" 1 } } */
-/* { dg-final { scan-assembler-times "fltq.d" 1 } } */
+/* { dg-final { scan-assembler-times {\mfleq\.s\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mfltq\.s\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mfleq\.d\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mfltq\.d\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c b/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c
index 05e2dcbe45eb125c16a9049b73a536a1052c0895..a97c7bd250f93dcfb4afd91fc2f2a741a890b2c4 100644
--- a/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c
+++ b/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c
@@ -39,4 +39,4 @@ void foo_float16 ()
   a = __builtin_nanf16 ("");
 }
 
-/* { dg-final { scan-assembler-times "fli.h" 32 } } */
+/* { dg-final { scan-assembler-times {\mfli\.h\M} 32 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zfa-fli.c b/gcc/testsuite/gcc.target/riscv/zfa-fli.c
index e5c1e591c8c88eb5bdbf626074feccde3556fe95..d7269c5f68a10a576efae3681e82dd5c9a454bbd 100644
--- a/gcc/testsuite/gcc.target/riscv/zfa-fli.c
+++ b/gcc/testsuite/gcc.target/riscv/zfa-fli.c
@@ -76,5 +76,5 @@ void foo_double64 ()
   a = __builtin_nan ("");
 }
 
-/* { dg-final { scan-assembler-times "fli.s" 32 } } */
-/* { dg-final { scan-assembler-times "fli.d" 32 } } */
+/* { dg-final { scan-assembler-times {\mfli\.s\M} 32 } } */
+/* { dg-final { scan-assembler-times {\mfli\.d\M} 32 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c
index 47d4e4c5683aefaddf9c510254501ea60853a06b..bcfa04bef91e0c921b5bdbb9f9535a6aa6856399 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c
@@ -43,7 +43,7 @@ int primitiveSemantics_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c
index 76773d32a8bd389f785d5062d4695f2c0415ef7b..0764d2919d44a562dd0da20ff350d435c4cef164 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c
@@ -59,7 +59,7 @@ int primitiveSemantics_return_0_imm_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c
index 2b4ee956eb71f32c9987ff1a93d570a235483b95..2ff5033bb0400cebbeb5d90f1bfab22797b81482 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c
@@ -67,7 +67,7 @@ int primitiveSemantics_return_imm_imm_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c
index 4a96560eb61ea297ecf38e7dac30cf4a6a6efd87..93844d166c35df6da8bacbf24e3134f7a81f1a3b 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c
@@ -59,7 +59,7 @@ int primitiveSemantics_return_imm_reg_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c
index 0624b6f16d472a52943eccf57bbdbbc61ff459c7..619ad8ecf7d24f1979053a1baa86bdf87a925a7d 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c
@@ -59,7 +59,7 @@ int primitiveSemantics_return_reg_reg_11(int a, int b, int c) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 12 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 12 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 12 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 12 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zknd64.c b/gcc/testsuite/gcc.target/riscv/zknd64.c
index 910b91c6ed88dbbfc753ed5313e6c266abdd51b5..707418cd51e75e29cae1852eeecd7f33672a6eb7 100644
--- a/gcc/testsuite/gcc.target/riscv/zknd64.c
+++ b/gcc/testsuite/gcc.target/riscv/zknd64.c
@@ -33,4 +33,4 @@ uint64_t foo5(uint64_t rs1)
 /* { dg-final { scan-assembler-times "aes64dsm" 1 } } */
 /* { dg-final { scan-assembler-times "aes64ks1i" 1 } } */
 /* { dg-final { scan-assembler-times "aes64ks2" 1 } } */
-/* { dg-final { scan-assembler-times "aes64im" 1 } } */
+/* { dg-final { scan-assembler-times {\maes64im} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksed32.c b/gcc/testsuite/gcc.target/riscv/zksed32.c
index 7df04147e05c79bc8b99f651f7ef93595574f823..0e8f01cd5485ff8b61b73b9b00d4c14c98ad1236 100644
--- a/gcc/testsuite/gcc.target/riscv/zksed32.c
+++ b/gcc/testsuite/gcc.target/riscv/zksed32.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1, uint32_t rs2, unsigned bs)
 }
 
 
-/* { dg-final { scan-assembler-times "sm4ks" 1 } } */
-/* { dg-final { scan-assembler-times "sm4ed" 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ks} 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ed} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksed64.c b/gcc/testsuite/gcc.target/riscv/zksed64.c
index 913e7be4e4d99126df5f233aa2e4cbd3f32b3487..9e4d1961419c41920d1042958c1c9a1e171c42ff 100644
--- a/gcc/testsuite/gcc.target/riscv/zksed64.c
+++ b/gcc/testsuite/gcc.target/riscv/zksed64.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1, uint32_t rs2, unsigned bs)
 }
 
 
-/* { dg-final { scan-assembler-times "sm4ks" 1 } } */
-/* { dg-final { scan-assembler-times "sm4ed" 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ks} 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ed} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksh32.c b/gcc/testsuite/gcc.target/riscv/zksh32.c
index 20513f986f880fced0461c3f4f791aa77fcf6cb2..c182e557a8588d1dc04c67c1fb7e298a5e3888c2 100644
--- a/gcc/testsuite/gcc.target/riscv/zksh32.c
+++ b/gcc/testsuite/gcc.target/riscv/zksh32.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1)
 }
 
 
-/* { dg-final { scan-assembler-times "sm3p0" 1 } } */
-/* { dg-final { scan-assembler-times "sm3p1" 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p0} 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p1} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksh64.c b/gcc/testsuite/gcc.target/riscv/zksh64.c
index 30bb1bdeeeb75b995d396041d6c80b80220773ea..d794b39f77af4259912b00ee57eff5221ed2a24e 100644
--- a/gcc/testsuite/gcc.target/riscv/zksh64.c
+++ b/gcc/testsuite/gcc.target/riscv/zksh64.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1)
 }
 
 
-/* { dg-final { scan-assembler-times "sm3p0" 1 } } */
-/* { dg-final { scan-assembler-times "sm3p1" 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p0} 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p1} 1 } } */