From d5f7d2d0416025b64cb2656af4bba3ae24ffa76c Mon Sep 17 00:00:00 2001
From: Richard Earnshaw <rearnsha@arm.com>
Date: Wed, 18 Feb 2004 18:44:23 +0000
Subject: [PATCH] re PR target/13866 (ICE in extract_insn, at recog.c:2083)
PR target/13866
* arm.c (load_multiple_operation): Don't insist that the source reg
of a post-increment component is the same as the destination.
(store_multiple_operation): Likewise.
From-SVN: r78041
---
gcc/ChangeLog | 7 +++++++
gcc/config/arm/arm.c | 2 --
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e09284cfbfca..05145c8d7102 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-02-18 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/13866
+ * arm.c (load_multiple_operation): Don't insist that the source reg
+ of a post-increment component is the same as the destination.
+ (store_multiple_operation): Likewise.
+
2004-02-18 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md: Move movsf patterns into one section
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 2ec011e90321..7ae53123c779 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -5051,7 +5051,6 @@ load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
/* Now check it more carefully. */
if (GET_CODE (SET_DEST (elt)) != REG
|| GET_CODE (XEXP (SET_SRC (elt), 0)) != REG
- || REGNO (XEXP (SET_SRC (elt), 0)) != REGNO (SET_DEST (elt))
|| GET_CODE (XEXP (SET_SRC (elt), 1)) != CONST_INT
|| INTVAL (XEXP (SET_SRC (elt), 1)) != (count - 1) * 4)
return 0;
@@ -5111,7 +5110,6 @@ store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
/* Now check it more carefully. */
if (GET_CODE (SET_DEST (elt)) != REG
|| GET_CODE (XEXP (SET_SRC (elt), 0)) != REG
- || REGNO (XEXP (SET_SRC (elt), 0)) != REGNO (SET_DEST (elt))
|| GET_CODE (XEXP (SET_SRC (elt), 1)) != CONST_INT
|| INTVAL (XEXP (SET_SRC (elt), 1)) != (count - 1) * 4)
return 0;
--
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