diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 875ed0a3e65bcfb11f042350bc1437e21de32b3d..8ec546a66fb83b9a6947ecb5188a612db116c009 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+Sun Apr 1 11:49:05 CEST 2001 Jan Hubicka <jH@suse.cz>
+
+ * i386.md: remove obsoleted comments.
+ (adddi_?): Rename to adddi_?_rex64; disable for 32bit.
+ (x86_movsicc_0_m1_rex64): Rename to x86_movdicc_0_m1_rex64;
+ fix output template.
+
2001-03-31 Marek Michalkiewicz <marekm@linux.org.pl>
* config/avr/libgcc.S (__mulhi3): Optimize previous change.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d8c402e9787824dc7b4a2af502b56a994a3c10e7..e87ee2cdb358979b91f9862e39608ecca245e7fa 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5134,7 +5134,6 @@
;; Add instructions
-;; %%% define_expand from the very first?
;; %%% splits for addsidi3
; [(set (match_operand:DI 0 "nonimmediate_operand" "")
; (plus:DI (match_operand:DI 1 "general_operand" "")
@@ -5473,12 +5472,13 @@
(const_string "alu")))
(set_attr "mode" "DI")])
-(define_insn "*adddi_3"
+(define_insn "*adddi_3_rex64"
[(set (reg 17)
(compare (neg:DI (match_operand:DI 2 "x86_64_general_operand" "rme"))
(match_operand:DI 1 "x86_64_general_operand" "%0")))
(clobber (match_scratch:DI 0 "=r"))]
- "ix86_match_ccmode (insn, CCZmode)
+ "TARGET_64BIT
+ && ix86_match_ccmode (insn, CCZmode)
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
/* Current assemblers are broken and do not allow @GOTOFF in
ought but a memory context. */
@@ -5529,12 +5529,13 @@
; when negated.
; Also carry flag is reversed compared to cmp, so this converison is valid
; only for comparisons not depending on it.
-(define_insn "*adddi_4"
+(define_insn "*adddi_4_rex64"
[(set (reg 17)
(compare (match_operand:DI 1 "nonimmediate_operand" "0")
(match_operand:DI 2 "x86_64_immediate_operand" "e")))
(clobber (match_scratch:DI 0 "=rm"))]
- "ix86_match_ccmode (insn, CCGCmode)"
+ "TARGET_64BIT
+ && ix86_match_ccmode (insn, CCGCmode)"
"*
{
switch (get_attr_type (insn))
@@ -5566,14 +5567,15 @@
(const_string "alu")))
(set_attr "mode" "DI")])
-(define_insn "*adddi_5"
+(define_insn "*adddi_5_rex64"
[(set (reg 17)
(compare
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0")
(match_operand:DI 2 "x86_64_general_operand" "rme"))
(const_int 0)))
(clobber (match_scratch:DI 0 "=r"))]
- "ix86_match_ccmode (insn, CCGOCmode)
+ "TARGET_64BIT
+ && ix86_match_ccmode (insn, CCGOCmode)
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
/* Current assemblers are broken and do not allow @GOTOFF in
ought but a memory context. */
@@ -8936,8 +8938,6 @@
;; Negation instructions
-;; %%% define_expand from the very first?
-
(define_expand "negdi2"
[(parallel [(set (match_operand:DI 0 "nonimmediate_operand" "")
(neg:DI (match_operand:DI 1 "nonimmediate_operand" "")))
@@ -14927,14 +14927,14 @@
"TARGET_64BIT"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;")
-(define_insn "x86_movsicc_0_m1_rex64"
+(define_insn "x86_movdicc_0_m1_rex64"
[(set (match_operand:DI 0 "register_operand" "=r")
(if_then_else:DI (ltu (reg:CC 17) (const_int 0))
(const_int -1)
(const_int 0)))
(clobber (reg:CC 17))]
"TARGET_64BIT"
- "sbb{l}\\t%0, %0"
+ "sbb{q}\\t%0, %0"
; Since we don't have the proper number of operands for an alu insn,
; fill in all the blanks.
[(set_attr "type" "alu")
@@ -14957,7 +14957,6 @@
[(set_attr "type" "icmov")
(set_attr "mode" "DI")])
-
(define_expand "movsicc"
[(set (match_operand:SI 0 "register_operand" "")
(if_then_else:SI (match_operand 1 "comparison_operator" "")