From e91a17fe39c39e98cebe6e1cbc8064ee6846a3a7 Mon Sep 17 00:00:00 2001
From: Tamar Christina <tamar.christina@arm.com>
Date: Mon, 17 May 2021 15:22:39 +0100
Subject: [PATCH] AArch64: Have -mcpu=native and -march=native enable
extensions when CPU is unknown
Currently when using -mcpu=native or -march=native on a CPU that is unknown to
the compiler the compiler currently just used -march=armv8-a and enables none
of the extensions.
To make this a bit more useful this patch changes it to still use -march=armv8.a
but to enable the extensions. We still cannot do tuning but at least if using
this on a future SVE core the compiler will at the very least enable SVE etc.
gcc/ChangeLog:
* config/aarch64/driver-aarch64.c (DEFAULT_ARCH): New.
(host_detect_local_cpu): Use it.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/info_16: New test.
* gcc.target/aarch64/cpunative/info_17: New test.
* gcc.target/aarch64/cpunative/native_cpu_16.c: New test.
* gcc.target/aarch64/cpunative/native_cpu_17.c: New test.
---
gcc/config/aarch64/driver-aarch64.c | 14 ++++++++++++--
gcc/testsuite/gcc.target/aarch64/cpunative/info_16 | 8 ++++++++
gcc/testsuite/gcc.target/aarch64/cpunative/info_17 | 8 ++++++++
.../gcc.target/aarch64/cpunative/native_cpu_16.c | 12 ++++++++++++
.../gcc.target/aarch64/cpunative/native_cpu_17.c | 12 ++++++++++++
5 files changed, 52 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/cpunative/info_16
create mode 100644 gcc/testsuite/gcc.target/aarch64/cpunative/info_17
create mode 100644 gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
diff --git a/gcc/config/aarch64/driver-aarch64.c b/gcc/config/aarch64/driver-aarch64.c
index e2935a115641..b58591d49746 100644
--- a/gcc/config/aarch64/driver-aarch64.c
+++ b/gcc/config/aarch64/driver-aarch64.c
@@ -58,6 +58,8 @@ struct aarch64_core_data
#define INVALID_IMP ((unsigned char) -1)
#define INVALID_CORE ((unsigned)-1)
#define ALL_VARIANTS ((unsigned)-1)
+/* Default architecture to use if -mcpu=native did not detect a known CPU. */
+#define DEFAULT_ARCH "8A"
#define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
{ CORE_NAME, #ARCH, IMP, PART, VARIANT, FLAGS },
@@ -390,10 +392,18 @@ host_detect_local_cpu (int argc, const char **argv)
&& (aarch64_cpu_data[i].variant == ALL_VARIANTS
|| variants[0] == aarch64_cpu_data[i].variant))
break;
+
if (aarch64_cpu_data[i].name == NULL)
- goto not_found;
+ {
+ aarch64_arch_driver_info* arch_info
+ = get_arch_from_id (DEFAULT_ARCH);
+
+ gcc_assert (arch_info);
- if (arch)
+ res = concat ("-march=", arch_info->name, NULL);
+ default_flags = arch_info->flags;
+ }
+ else if (arch)
{
const char *arch_id = aarch64_cpu_data[i].arch;
aarch64_arch_driver_info* arch_info = get_arch_from_id (arch_id);
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
new file mode 100644
index 000000000000..b0679579d916
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
+CPU implementer : 0xff
+CPU architecture: 8
+CPU variant : 0x0
+CPU part : 0xd08
+CPU revision : 2
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
new file mode 100644
index 000000000000..b0679579d916
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
+CPU implementer : 0xff
+CPU architecture: 8
+CPU variant : 0x0
+CPU part : 0xd08
+CPU revision : 2
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
new file mode 100644
index 000000000000..a424e7c56c78
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_16" } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
+
+/* Test a normal looking procinfo. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
new file mode 100644
index 000000000000..c269c5fef7f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_17" } */
+/* { dg-additional-options "-march=native" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
+
+/* Test a normal looking procinfo. */
--
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