diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5d25bab88d92a05c4b37864d0aa2b9dde3c8c60e..20e3b3a8c6a1b30e626f6735f8c505ee3a3c6e14 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -4,7 +4,6 @@
 	condition to disallow non-identical memory locations.
 	(*andqi3_2, andqi3_1, iorqi3_1, xorqi3_1): Reorder insn to give
 	preference to bit manipulation instructions.
-	* gcc.dg/h8300-bit-insn-ice2.2: New testcase.
 
 2011-06-13  Jan Hubicka  <jh@suse.cz>
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c3f3a15c4409ab49ed8051aaff0cb132d64721bb..4c455ee3ac66a770e52b9166ee90ca3d3ff6ec15 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2011-06-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gcc.dg/h8300-bit-insn-ice2.2: Remove duplicated lines.
+
+2011-06-13  Kaushik Phatak <kaushik.phatak@kpitcummins.com>
+
+	* gcc.dg/h8300-bit-insn-ice2.2: New testcase.
+
 2011-06-13  Thomas Koenig  <tkoenig@gcc.gnu.org>
 
 	* gfortran.dg/trim_optimize_8.f90:  New test case.
diff --git a/gcc/testsuite/gcc.dg/h8300-bit-insn-ice2.c b/gcc/testsuite/gcc.dg/h8300-bit-insn-ice2.c
index ea9e8b385b1a14df0788447e58a5fba920607620..8b5f628759b41e051a914e5fef750b0f82136466 100644
--- a/gcc/testsuite/gcc.dg/h8300-bit-insn-ice2.c
+++ b/gcc/testsuite/gcc.dg/h8300-bit-insn-ice2.c
@@ -13,18 +13,3 @@ main (void)
   MSTPCRA = MSTPCRA2 | ~0xFE;
   return 0;
 }
-/* { dg-skip-if "" { "h8300*-*-*" } "*" "-msx*" }  */
-/* { dg-options "-O2" } */
-/* ICE for bit instruction generation using 16-bit const */
-
-#define MSTPCRA (*(volatile unsigned char*)0xFFFFC9)
-#define MSTPCRA2 (*(volatile unsigned char*)0xFFFDC8)
-
-int
-main (void)
-{
-  MSTPCRA = MSTPCRA2 & ~0x01;
-  MSTPCRA = MSTPCRA2 ^ ~0xFE;
-  MSTPCRA = MSTPCRA2 | ~0xFE;
-  return 0;
-}