From ef402c6521e1fd6fee2ad6a1d9c2f972f57c5ede Mon Sep 17 00:00:00 2001
From: Oleg Endo <olegendo@gcc.gnu.org>
Date: Tue, 8 May 2012 21:36:30 +0000
Subject: [PATCH] re PR target/51244 ([SH] Inefficient conditional branch and
 code around T bit)

	PR target/51244
	* config/sh/sh.md (*branch_true, *branch_false): New insns.

From-SVN: r187298
---
 gcc/ChangeLog       |  5 +++++
 gcc/config/sh/sh.md | 48 ++++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a3f5a8fd9d6c..aa5537aea02d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-05-08  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/51244
+	* config/sh/sh.md (*branch_true, *branch_false): New insns.
+
 2012-05-08   Teresa Johnson  <tejohnson@google.com>
 
 	* gcov-io.h (__gcov_reset, __gcov_dump): Declare.
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 914d5bf8b924..7167b920641a 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -7097,6 +7097,29 @@ label:
 }
   [(set_attr "type" "cbranch")])
 
+;; The *branch_true patterns help combine when trying to invert conditions.
+(define_insn "*branch_true"
+  [(set (pc) (if_then_else (ne (zero_extend:SI (subreg:QI (reg:SI T_REG) 0))
+			       (const_int 0))
+			   (label_ref (match_operand 0 "" ""))
+			   (pc)))]
+  "TARGET_SH1 && TARGET_LITTLE_ENDIAN"
+{
+  return output_branch (1, insn, operands);
+}
+  [(set_attr "type" "cbranch")])
+
+(define_insn "*branch_true"
+  [(set (pc) (if_then_else (ne (zero_extend:SI (subreg:QI (reg:SI T_REG) 3))
+			       (const_int 0))
+			   (label_ref (match_operand 0 "" ""))
+			   (pc)))]
+  "TARGET_SH1 && ! TARGET_LITTLE_ENDIAN"
+{
+  return output_branch (1, insn, operands);
+}
+  [(set_attr "type" "cbranch")])
+
 (define_insn "branch_false"
   [(set (pc) (if_then_else (eq (reg:SI T_REG) (const_int 0))
 			   (label_ref (match_operand 0 "" ""))
@@ -7107,6 +7130,29 @@ label:
 }
   [(set_attr "type" "cbranch")])
 
+;; The *branch_false patterns help combine when trying to invert conditions.
+(define_insn "*branch_false"
+  [(set (pc) (if_then_else (eq (zero_extend:SI (subreg:QI (reg:SI T_REG) 0))
+			       (const_int 0))
+			   (label_ref (match_operand 0 "" ""))
+			   (pc)))]
+  "TARGET_SH1 && TARGET_LITTLE_ENDIAN"
+{
+  return output_branch (0, insn, operands);
+}
+  [(set_attr "type" "cbranch")])
+
+(define_insn "*branch_false"
+  [(set (pc) (if_then_else (eq (zero_extend:SI (subreg:QI (reg:SI T_REG) 3))
+			       (const_int 0))
+			   (label_ref (match_operand 0 "" ""))
+			   (pc)))]
+  "TARGET_SH1 && ! TARGET_LITTLE_ENDIAN"
+{
+  return output_branch (0, insn, operands);
+}
+  [(set_attr "type" "cbranch")])
+
 ;; Patterns to prevent reorg from re-combining a condbranch with a branch
 ;; which destination is too far away.
 ;; The const_int_operand is distinct for each branch target; it avoids
@@ -9721,7 +9767,7 @@ label:
   ""
   [(const_int 0)])
 
-;; The *movtt patterns improve code at -O1.
+;; The *movtt patterns eliminate redundant T bit to T bit moves / tests.
 (define_insn_and_split "*movtt"
   [(set (reg:SI T_REG)
 	(eq:SI (zero_extend:SI (subreg:QI (reg:SI T_REG) 3))
-- 
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