diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b580e2594ff937c451b32e3d095c86d605e7110e..efa473674b8e137e12d9d86df2bc30b5a7984f05 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,78 @@ +2024-08-18 Jeff Law <jlaw@ventanamicro.com> + + PR rtl-optimization/115876 + * ext-dce.cc (ext_dce_process_sets): Replace hardcoded 63/64 instances + with HOST_BITS_PER_WIDE_INT based values. + (carry_backpropagate): Handle modes with more bits than + HOST_BITS_PER_WIDE_INT gracefully, avoiding undefined behavior. + (ext_dce_process_uses): Handle subreg offsets which would result + in ubsan shifts gracefully, avoiding undefined behavior. + +2024-08-18 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/gm2.texi (Contributing): Tweak gm2 mailing list address. + +2024-08-18 Andrew Pinski <quic_apinski@quicinc.com> + + * gimple-match-exports.cc (gimple_match_op::operands_occurs_in_abnormal_phi): + New function. + * gimple-match.h (gimple_match_op): Add operands_occurs_in_abnormal_phi. + * tree-ssa-phiopt.cc (factor_out_conditional_operation): Use gimple_match_op + instead of manually extracting from/creating the gimple. + +2024-08-18 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.md (*add<mode>3_split) [!reload_completed]: + Add a scratch:QI to 16-bit additions with constant. + +2024-08-18 Georg-Johann Lay <avr@gjlay.de> + + PR target/116407 + * config/avr/avr.md (*dec-and-branchhi!=-1.l.clobber): + Increase the additional jump offset to 2 words. + +2024-08-18 Georg-Johann Lay <avr@gjlay.de> + + PR target/116407 + * config/avr/avr-protos.h (avr_jump_mode): Add an int argument. + * config/avr/avr.cc (avr_jump_mode): Add an int argument to increase + the computed jump offset of backwards branches. + * config/avr/avr.md (*dec-and-branchhi!=-1, *dec-and-branchsi!=-1): + Increase the jump offset used by avr_jump_mode() as needed. + +2024-08-18 Andrew Pinski <quic_apinski@quicinc.com> + + * gimple-fold.cc (mark_lhs_in_seq_for_dce): New function. + (replace_stmt_with_simplification): Call mark_lhs_in_seq_for_dce + right before inserting the sequence. + (fold_stmt_1): Add dce_worklist argument, update call to + replace_stmt_with_simplification. + (fold_stmt): Add dce_worklist argument, update call to fold_stmt_1. + (fold_stmt_inplace): Update call to fold_stmt_1. + * gimple-fold.h (fold_stmt): Add bitmap argument. + * tree-ssa-forwprop.cc (pass_forwprop::execute): Update call to fold_stmt. + +2024-08-18 Pan Li <pan2.li@intel.com> + + * config/riscv/iterators.md (ANYI_QUAD_TRUNC): New iterator for + quad truncation. + (ANYI_OCT_TRUNC): New iterator for oct truncation. + (ANYI_QUAD_TRUNCATED): New attr for truncated quad modes. + (ANYI_OCT_TRUNCATED): New attr for truncated oct modes. + (anyi_quad_truncated): Ditto but for lower case. + (anyi_oct_truncated): Ditto but for lower case. + * config/riscv/riscv.md (ustrunc<mode><anyi_quad_truncated>2): + Add new pattern for quad truncation. + (ustrunc<mode><anyi_oct_truncated>2): Ditto but for oct. + +2024-08-18 Pan Li <pan2.li@intel.com> + + PR target/116278 + * config/riscv/riscv.cc (riscv_gen_zero_extend_rtx): Add new + func impl to zero extend rtx. + (riscv_expand_usadd): Leverage above func to cleanup operands 0 + and remove the special handing for SImode in RV64. + 2024-08-17 Jeff Law <jlaw@ventanamicro.com> * ext-dce.cc (carry_backpropagate): Cast mask to HOST_WIDE_INT before diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 5e34934c797ceb8824936e7159373e6278958c03..6197155f323eaa353fe9fb14b0184614da89a90b 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240818 +20240819 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 4a5bd9cb43e00fdf65c7c53e2b8740e9dbd980c9..99a88282067da157f5284902e668469406eabf05 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,62 @@ +2024-08-18 Andrew Pinski <quic_apinski@quicinc.com> + + * gcc.target/i386/pr87007-5.c: Disable phi-opt. + +2024-08-18 Georg-Johann Lay <avr@gjlay.de> + + PR target/116407 + * gcc.target/avr/torture/pr116407-2.c: New test. + * gcc.target/avr/torture/pr116407-4.c: New test. + +2024-08-18 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-2.c: Adjust + the expand dump check times. + * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-3.c: Ditto. + * gcc.target/riscv/sat_arith_data.h: Add test helper macros. + * gcc.target/riscv/sat_u_trunc-4.c: New test. + * gcc.target/riscv/sat_u_trunc-5.c: New test. + * gcc.target/riscv/sat_u_trunc-6.c: New test. + * gcc.target/riscv/sat_u_trunc-run-4.c: New test. + * gcc.target/riscv/sat_u_trunc-run-5.c: New test. + * gcc.target/riscv/sat_u_trunc-run-6.c: New test. + +2024-08-18 Pan Li <pan2.li@intel.com> + + PR target/116278 + * gcc.target/riscv/sat_u_add-11.c: Adjust asm check body. + * gcc.target/riscv/sat_u_add-15.c: Ditto. + * gcc.target/riscv/sat_u_add-19.c: Ditto. + * gcc.target/riscv/sat_u_add-23.c: Ditto. + * gcc.target/riscv/sat_u_add-3.c: Ditto. + * gcc.target/riscv/sat_u_add-7.c: Ditto. + * gcc.target/riscv/sat_u_add_imm-11.c: Ditto. + * gcc.target/riscv/sat_u_add_imm-15.c: Ditto. + * gcc.target/riscv/sat_u_add_imm-3.c: Ditto. + * gcc.target/riscv/sat_u_add_imm-7.c: Ditto. + * gcc.target/riscv/pr116278-run-1.c: New test. + * gcc.target/riscv/pr116278-run-2.c: New test. + +2024-08-18 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/sat_arith.h: Add test helper macros. + * gcc.target/riscv/sat_u_trunc-13.c: New test. + * gcc.target/riscv/sat_u_trunc-14.c: New test. + * gcc.target/riscv/sat_u_trunc-15.c: New test. + * gcc.target/riscv/sat_u_trunc-run-13.c: New test. + * gcc.target/riscv/sat_u_trunc-run-14.c: New test. + * gcc.target/riscv/sat_u_trunc-run-15.c: New test. + +2024-08-18 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/sat_arith.h: Add test helper macros. + * gcc.target/riscv/sat_u_trunc-7.c: New test. + * gcc.target/riscv/sat_u_trunc-8.c: New test. + * gcc.target/riscv/sat_u_trunc-9.c: New test. + * gcc.target/riscv/sat_u_trunc-run-7.c: New test. + * gcc.target/riscv/sat_u_trunc-run-8.c: New test. + * gcc.target/riscv/sat_u_trunc-run-9.c: New test. + 2024-08-17 Jin Ma <jinma@linux.alibaba.com> * gcc.target/riscv/rvv/base/bug-7.c: New test. diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog index f34f359c995fc84122f5aa84c5fd63e0b1648c91..8780909465d4adfc2efd61bdc40705b2d0d084e2 100644 --- a/libgfortran/ChangeLog +++ b/libgfortran/ChangeLog @@ -1,3 +1,9 @@ +2024-08-18 Sergey Fedorov <vital.had@gmail.com> + + * config/fpu-macppc.h (new file): initial support for powerpc-darwin. + * configure.host: enable ieee_support for powerpc-darwin case, + set fpu_host='fpu-macppc'. + 2024-07-25 Jerry DeLisle <jvdelisle@gcc.gnu.org> PR libfortran/105361 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index d27a3ac6670e306c9574e96224d23acbda31d11a..0d56bf5bb220b2314897672eaf0e62c08e69cef3 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,9 @@ +2024-08-18 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/xml/manual/prerequisites.xml: Remove note from the + GCC 4.0.1 days. + * doc/html/manual/setup.html: Regenerate. + 2024-08-17 Gerald Pfeifer <gerald@pfeifer.com> * doc/xml/manual/abi.xml: Update reference to