From f155534979e367c189d5210daa54af93c39ce683 Mon Sep 17 00:00:00 2001
From: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Thu, 22 Aug 2024 00:18:14 +0000
Subject: [PATCH] Daily bump.
---
gcc/ChangeLog | 56 +++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/cp/ChangeLog | 6 +++
gcc/fortran/ChangeLog | 15 ++++++++
gcc/testsuite/ChangeLog | 84 +++++++++++++++++++++++++++++++++++++++++
libstdc++-v3/ChangeLog | 20 ++++++++++
6 files changed, 182 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d955a57daea8..4f6b8df32bc0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,59 @@
+2024-08-21 Jeff Law <jlaw@ventanamicro.com>
+
+ PR rtl-optimization/116437
+ * ext-dce.cc (ext_dce_try_optimize_insn): Handle SUBREG and
+ ZERO_EXTRACT destinations.
+
+2024-08-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR testsuite/116238
+ * config/aarch64/aarch64.cc (aarch64_hard_regno_caller_save_mode):
+ Only return SImode if we can convert to and from it.
+
+2024-08-21 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR target/113042
+ * config/aarch64/aarch64.md (popcountti2): New define_expand.
+
+2024-08-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/116406
+ * tree-ssa-sccvn.cc (vn_reference_eq): Never equate
+ float and int when the float mode cannot transfer bits.
+ Do not try to anticipate which is the mode we actually load
+ from.
+
+2024-08-21 Martin Jambor <mjambor@suse.cz>
+
+ PR target/58416
+ * tree-sra.cc (types_risk_mangled_binary_repr_p): New function.
+ (sort_and_splice_var_accesses): Use it.
+ (propagate_subaccesses_from_rhs): Likewise.
+
+2024-08-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/116380
+ * tree-loop-distribution.cc (copy_loop_before): Handle
+ out-of-loop defs appropriately.
+
+2024-08-21 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/vsx.md (define_insn *vsx_le_perm_store_{<VSX_D:mode>,
+ <VSX_W:mode>,v8hi,v16qi,<VSX_LE_128:mode>}): Remove constraint modifier
+ "+" from operand 1.
+
+2024-08-21 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/vsx.md (*vsx_le_perm_store_{<VSX_D:mode>,<VSX_W:mode>,
+ v8hi,v16qi,<VSX_LE_128:mode>} !reload_completed splitters): Assert
+ can_create_pseudo_p and always generate one new pseudo for operand 1.
+
+2024-08-21 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/sse.md (mov<mode>): Align predicates for
+ operands[1] between mov<mode> and *mov<mode>_internal.
+ * config/i386/mmx.md (mov<mode>): Ditto.
+
2024-08-21 Andrew Pinski <quic_apinski@quicinc.com>
* builtins.cc (fold_builtin_bit_query): Don't expand double
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 2927c941b573..7e53ea86edca 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240821
+20240822
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 838e7d725156..12b8c22b803e 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,9 @@
+2024-08-21 Iain Sandoe <iain@sandoe.co.uk>
+
+ * coroutines.cc (split_coroutine_body_from_ramp): Check
+ that the binding level is as expected before attempting
+ to outline the function body.
+
2024-08-20 Nathaniel Shead <nathanieloshead@gmail.com>
* module.cc (module_state::write_begin): Return a boolean to
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 7e6594215606..cbc17e9a59d9 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,18 @@
+2024-08-21 Andre Vehreschild <vehre@gcc.gnu.org>
+
+ PR fortran/86468
+ * trans-intrinsic.cc (conv_intrinsic_move_alloc): Correct
+ comment.
+ * trans-types.cc (gfc_sym_type): Pass coarray rank, not false.
+ (gfc_get_derived_type): Only propagate codimension for coarrays
+ and pointers to array components in derived typed coarrays.
+
+2024-08-21 Andre Vehreschild <vehre@gcc.gnu.org>
+
+ PR fortran/77518
+ * trans-intrinsic.cc (gfc_conv_intrinsic_sizeof): Use
+ class_container of se when set.
+
2024-08-20 Andre Vehreschild <vehre@gcc.gnu.org>
PR fortran/84246
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c89f74a7d832..15db7d39d033 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,87 @@
+2024-08-21 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-13.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-14.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-15.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-16.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-17.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-18.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-13.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-14.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-15.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-16.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-17.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-18.c: New test.
+
+2024-08-21 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-10.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-11.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-12.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-7.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-8.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-9.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-10.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-11.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-12.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-7.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-8.c: New test.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-9.c: New test.
+
+2024-08-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR testsuite/116238
+ * gcc.target/aarch64/sve/pr116238.c: New test.
+
+2024-08-21 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR target/113042
+ * gcc.target/aarch64/popcnt10.c: New test.
+ * gcc.target/aarch64/popcnt9.c: New test.
+
+2024-08-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/116406
+ * gcc.dg/tree-ssa/pr116406.c: New testcase.
+ * gcc.dg/tree-ssa/ssa-pre-30.c: On x86 dd -msse -mfpmath=sse.
+
+2024-08-21 Martin Jambor <mjambor@suse.cz>
+
+ PR target/58416
+ * gcc.dg/torture/pr58416.c: New test.
+
+2024-08-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/116380
+ * gcc.dg/torture/pr116380.c: New testcase.
+
+2024-08-21 Andre Vehreschild <vehre@gcc.gnu.org>
+
+ * gfortran.dg/coarray_lib_this_image_2.f90: Fix array rank in
+ tree dump scan.
+ * gfortran.dg/coarray_lib_token_4.f90: Same.
+ * gfortran.dg/coarray/move_alloc_2.f90: New test.
+
+2024-08-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * g++.target/i386/pr116275-2.C (dg-options): Add -mstv
+ -mno-stackrealign.
+
+2024-08-21 Andre Vehreschild <vehre@gcc.gnu.org>
+
+ PR fortran/77518
+ * gfortran.dg/coarray/sizeof_1.f90: New test.
+
+2024-08-21 Kewen Lin <linkw@linux.ibm.com>
+
+ * lib/target-supports.exp (check_vect_support_and_set_flags): Remove
+ the if arm checking powerpc-*paired*.
+ (check_750cl_hw_available): Remove.
+ (check_effective_target_vect_unpack): Remove the check on
+ powerpc-*paired*.
+
2024-08-20 Pan Li <pan2.li@intel.com>
* gcc.target/riscv/sat_arith.h: Fix SAT_TRUNC typo.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 28c17c124047..ff44fb138813 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,23 @@
+2024-08-21 Jonathan Wakely <jwakely@redhat.com>
+
+ PR tree-optimization/102958
+ * include/bits/char_traits.h (char_traits<char8_t>::length): Use
+ strlen.
+
+2024-08-21 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/114862
+ * src/c++98/locale_facets.cc (__num_base::_S_format_float):
+ Check uppercase flag for fixed format.
+ * testsuite/22_locale/num_put/put/char/lwg4084.cc: New test.
+
+2024-08-21 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/116381
+ * include/std/variant (variant): Fix conditions for
+ static_assert to match the spec.
+ * testsuite/20_util/variant/types_neg.cc: New test.
+
2024-08-20 Jonathan Wakely <jwakely@redhat.com>
* include/std/optional: Remove redundant redeclaration.
--
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