From f1ba94ddd2f8e9159b45ecb79cfa39a38944933a Mon Sep 17 00:00:00 2001
From: Richard Henderson <rth@redhat.com>
Date: Tue, 16 Apr 2002 17:34:44 -0700
Subject: [PATCH] mips.md (can_delay): Split out of existing define_delays.

        * config/mips/mips.md (can_delay): Split out of existing define_delays.
        (HILO_delay): Set can_delay false.

From-SVN: r52387
---
 gcc/ChangeLog           |  6 ++++++
 gcc/config/mips/mips.md | 32 +++++++++++++++++---------------
 2 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3a185ec3e00b..74a936b630f0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2002-04-16  Richard Henderson  <rth@redhat.com>
+
+	PR 6202
+	* config/mips/mips.md (can_delay): Split out of existing define_delays.
+	(HILO_delay): Set can_delay false.
+
 2002-04-16  Dale Johannesen <dalej@apple.com>
 
 	* config/rs6000/rs6000.c (rs6000_output_function_prologue): Compute
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index fbaf63faf7f1..c90109f82d17 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -135,6 +135,18 @@
 		(const_string "yes")
 		(const_string "no")))
 
+;; Can the instruction be put into a delay slot?
+(define_attr "can_delay" "no,yes"
+  (if_then_else (and (eq_attr "dslot" "no")
+		     ; ADJUST_INSN_LENGTH divides length by 2 on mips16,
+		     ; so cope with it here.
+		     (ior (and (eq (symbol_ref "mips16") (const_int 0))
+			           (eq_attr "length" "4"))
+			  (and (ne (symbol_ref "mips16") (const_int 0))
+			       (eq_attr "length" "2"))))
+		(const_string "yes")
+		(const_string "no")))
+
 ;; Attribute defining whether or not we can use the branch-likely instructions
 
 (define_attr "branch_likely" "no,yes"
@@ -162,30 +174,19 @@
 
 (define_delay (and (eq_attr "type" "branch")
 		   (eq (symbol_ref "mips16") (const_int 0)))
-  [(and (eq_attr "dslot" "no") (eq_attr "length" "4"))
+  [(eq_attr "can_delay" "yes")
    (nil)
    (and (eq_attr "branch_likely" "yes")
 	(and (eq_attr "dslot" "no")
 	     (eq_attr "length" "4")))])
 
 (define_delay (eq_attr "type" "jump")
-  [(and (eq_attr "dslot" "no")
-	;; ADJUST_INSN_LENGTH divides length by 2 on mips16, so cope
-	;; with it here.  It doesn't matter for branches above,
-	;; because mips16 branches don't have delay slots anyway.
-	(ior (and (eq (symbol_ref "mips16") (const_int 0))
-		  (eq_attr "length" "4"))
-	     (and (ne (symbol_ref "mips16") (const_int 0))
-		  (eq_attr "length" "2"))))
+  [(eq_attr "can_delay" "yes")
    (nil)
    (nil)])
 
 (define_delay (and (eq_attr "type" "call") (eq_attr "abicalls" "no"))
-  [(and (eq_attr "dslot" "no")
-	(ior (and (eq (symbol_ref "mips16") (const_int 0))
-		  (eq_attr "length" "4"))
-	     (and (ne (symbol_ref "mips16") (const_int 0))
-		  (eq_attr "length" "2"))))
+  [(eq_attr "can_delay" "yes")
    (nil)
    (nil)])
 
@@ -5823,7 +5824,8 @@ move\\t%0,%z4\\n\\
   ""
   ""
   [(set_attr "type" "nop")
-   (set_attr "mode" "none")])
+   (set_attr "mode" "none")
+   (set_attr "can_delay" "no")])
 
 ;; This insn handles moving CCmode values.  It's really just a
 ;; slightly simplified copy of movsi_internal2, with additional cases
-- 
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