diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 405b081e432b56740f5e5744aca71a91cca5de61..7bd6a72ce2705a32b012153f74b932ee08625aab 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2003-02-19  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/h8300/h8300.md (extendqisi2): Change to an expander.
+	(*extendqisi2_h8300): New.
+	(*extendqisi2_h8300hs): Likewise.
+
 2003-02-19  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* config/h8300/h8300-protos.h: Update the prototype for
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 817b52d6f64873259318a833edd807036517c8d8..2332c4b64ac9236e96ef537fabe818b702827b5c 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -2101,10 +2101,14 @@
   [(set_attr "length" "2")
    (set_attr "cc" "set_znv")])
 
-;; The compiler can synthesize a H8/300H variant of this which is
-;; just as efficient as one that we'd create
-(define_insn "extendqisi2"
+(define_expand "extendqisi2"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
+	(sign_extend:SI (match_operand:QI 1 "register_operand" "")))]
+  ""
+  "")
+
+(define_insn "*extendqisi2_h8300"
+  [(set (match_operand:SI 0 "register_operand" "")
 	(sign_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]
   "TARGET_H8300"
   "@
@@ -2113,6 +2117,22 @@
   [(set_attr "length" "8,12")
    (set_attr "cc" "clobber,clobber")])
 
+;; The following pattern is needed because without the pattern, the
+;; combiner would split (sign_extend:SI (reg:QI)) into into two 24-bit
+;; shifts, one ashift and one ashiftrt.
+
+(define_insn_and_split "*extendqisi2_h8300hs"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(sign_extend:SI (match_operand:QI 1 "register_operand" "0")))]
+  "(TARGET_H8300H || TARGET_H8300S)"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 2)
+	(sign_extend:HI (match_dup 1)))
+   (set (match_dup 0)
+	(sign_extend:SI (match_dup 2)))]
+  "operands[2] = gen_rtx_REG (HImode, REGNO (operands[0]));")
+
 (define_expand "extendhisi2"
   [(set (match_operand:SI 0 "register_operand" "")
 	(sign_extend:SI (match_operand:HI 1 "register_operand" "")))]