From f729943b894af29cf11620065559ce6765b3d9d9 Mon Sep 17 00:00:00 2001
From: Uros Bizjak <ubizjak@gmail.com>
Date: Mon, 25 Apr 2016 23:57:42 +0200
Subject: [PATCH] i386.md (*movxi_internal_avx512f): Use insn type attribute
instead of which_alternative.
* config/i386/i386.md (*movxi_internal_avx512f): Use insn type
attribute instead of which_alternative.
* config/i386/sse.md (*mov<mode>_internal): Ditto.
Use EXT_REX_SSE_REG_P where appropriate.
From-SVN: r235422
---
gcc/ChangeLog | 7 +++++++
gcc/config/i386/i386.md | 9 +++++----
gcc/config/i386/sse.md | 19 ++++++++++---------
3 files changed, 22 insertions(+), 13 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 37389d6f5746..282642c70e7f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2016-04-25 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*movxi_internal_avx512f): Use insn type
+ attribute instead of which_alternative.
+ * config/i386/sse.md (*mov<mode>_internal): Ditto.
+ Use EXT_REX_SSE_REG_P where appropriate.
+
2016-04-25 Uros Bizjak <ubizjak@gmail.com>
* config/i386/predicates.md (const0_operand): Do not match
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 7fbba2dccc4f..b1f8461c9723 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1975,17 +1975,18 @@
&& (register_operand (operands[0], XImode)
|| register_operand (operands[1], XImode))"
{
- switch (which_alternative)
+ switch (get_attr_type (insn))
{
- case 0:
+ case TYPE_SSELOG1:
return standard_sse_constant_opcode (insn, operands[1]);
- case 1:
- case 2:
+
+ case TYPE_SSEMOV:
if (misaligned_operand (operands[0], XImode)
|| misaligned_operand (operands[1], XImode))
return "vmovdqu32\t{%1, %0|%0, %1}";
else
return "vmovdqa32\t{%1, %0|%0, %1}";
+
default:
gcc_unreachable ();
}
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 4c916bf7c645..45442bd7fecb 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -839,19 +839,18 @@
&& (register_operand (operands[0], <MODE>mode)
|| register_operand (operands[1], <MODE>mode))"
{
- int mode = get_attr_mode (insn);
- switch (which_alternative)
+ switch (get_attr_type (insn))
{
- case 0:
+ case TYPE_SSELOG1:
return standard_sse_constant_opcode (insn, operands[1]);
- case 1:
- case 2:
+
+ case TYPE_SSEMOV:
/* There is no evex-encoded vmov* for sizes smaller than 64-bytes
in avx512f, so we need to use workarounds, to access sse registers
16-31, which are evex-only. In avx512vl we don't need workarounds. */
if (TARGET_AVX512F && <MODE_SIZE> < 64 && !TARGET_AVX512VL
- && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0])))
- || (REG_P (operands[1]) && EXT_REX_SSE_REGNO_P (REGNO (operands[1])))))
+ && (EXT_REX_SSE_REG_P (operands[0])
+ || EXT_REX_SSE_REG_P (operands[1])))
{
if (memory_operand (operands[0], <MODE>mode))
{
@@ -873,7 +872,7 @@
}
else
/* Reg -> reg move is always aligned. Just use wider move. */
- switch (mode)
+ switch (get_attr_mode (insn))
{
case MODE_V8SF:
case MODE_V4SF:
@@ -888,7 +887,8 @@
gcc_unreachable ();
}
}
- switch (mode)
+
+ switch (get_attr_mode (insn))
{
case MODE_V16SF:
case MODE_V8SF:
@@ -931,6 +931,7 @@
default:
gcc_unreachable ();
}
+
default:
gcc_unreachable ();
}
--
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