diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 75861c456c06444d03dc4d4963f14332d5be007f..16a21da3446191e3697006637455b036c4b512f5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2010-11-16 Richard Henderson <rth@redhat.com>
+
+ * config/pa/pa.md (fmadf4): Rename from unnamed; use FMA.
+ (fmasf4, fnmadf4, fnmasf4): Likewise.
+ (unnamed plus+mult insns and splitters): Delete.
+
2010-11-16 Richard Henderson <rth@redhat.com>
* config/spu/spu.md (fma<VSF>4): Rename from fma_<VSF>.
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index a68989f4fdc3a1d2a391382d186b7a415c9b4a38..0d51c62db7e56ed4493670c7838ff05292bd779f 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -6090,64 +6090,44 @@
;; PA 2.0 floating point instructions
; fmpyfadd patterns
-(define_insn ""
+(define_insn "fmadf4"
[(set (match_operand:DF 0 "register_operand" "=f")
- (plus:DF (mult:DF (match_operand:DF 1 "register_operand" "f")
- (match_operand:DF 2 "register_operand" "f"))
- (match_operand:DF 3 "register_operand" "f")))]
+ (fma:DF (match_operand:DF 1 "register_operand" "f")
+ (match_operand:DF 2 "register_operand" "f")
+ (match_operand:DF 3 "register_operand" "f")))]
"TARGET_PA_20 && ! TARGET_SOFT_FLOAT"
"fmpyfadd,dbl %1,%2,%3,%0"
[(set_attr "type" "fpmuldbl")
(set_attr "length" "4")])
-(define_insn ""
- [(set (match_operand:DF 0 "register_operand" "=f")
- (plus:DF (match_operand:DF 1 "register_operand" "f")
- (mult:DF (match_operand:DF 2 "register_operand" "f")
- (match_operand:DF 3 "register_operand" "f"))))]
- "TARGET_PA_20 && ! TARGET_SOFT_FLOAT"
- "fmpyfadd,dbl %2,%3,%1,%0"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "4")])
-
-(define_insn ""
+(define_insn "fmasf4"
[(set (match_operand:SF 0 "register_operand" "=f")
- (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "f")
- (match_operand:SF 2 "register_operand" "f"))
- (match_operand:SF 3 "register_operand" "f")))]
+ (fma:SF (match_operand:SF 1 "register_operand" "f")
+ (match_operand:SF 2 "register_operand" "f")
+ (match_operand:SF 3 "register_operand" "f")))]
"TARGET_PA_20 && ! TARGET_SOFT_FLOAT"
"fmpyfadd,sgl %1,%2,%3,%0"
[(set_attr "type" "fpmulsgl")
(set_attr "length" "4")])
-(define_insn ""
- [(set (match_operand:SF 0 "register_operand" "=f")
- (plus:SF (match_operand:SF 1 "register_operand" "f")
- (mult:SF (match_operand:SF 2 "register_operand" "f")
- (match_operand:SF 3 "register_operand" "f"))))]
- "TARGET_PA_20 && ! TARGET_SOFT_FLOAT"
- "fmpyfadd,sgl %2,%3,%1,%0"
- [(set_attr "type" "fpmulsgl")
- (set_attr "length" "4")])
-
; fmpynfadd patterns
-(define_insn ""
+(define_insn "fnmadf4"
[(set (match_operand:DF 0 "register_operand" "=f")
- (minus:DF (match_operand:DF 1 "register_operand" "f")
- (mult:DF (match_operand:DF 2 "register_operand" "f")
- (match_operand:DF 3 "register_operand" "f"))))]
+ (fma:DF (neg:DF (match_operand:DF 1 "register_operand" "f"))
+ (match_operand:DF 2 "register_operand" "f")
+ (match_operand:DF 3 "register_operand" "f")))]
"TARGET_PA_20 && ! TARGET_SOFT_FLOAT"
- "fmpynfadd,dbl %2,%3,%1,%0"
+ "fmpynfadd,dbl %1,%2,%3,%0"
[(set_attr "type" "fpmuldbl")
(set_attr "length" "4")])
-(define_insn ""
+(define_insn "fnmasf4"
[(set (match_operand:SF 0 "register_operand" "=f")
- (minus:SF (match_operand:SF 1 "register_operand" "f")
- (mult:SF (match_operand:SF 2 "register_operand" "f")
- (match_operand:SF 3 "register_operand" "f"))))]
+ (fma:SF (neg:SF (match_operand:SF 1 "register_operand" "f"))
+ (match_operand:SF 2 "register_operand" "f")
+ (match_operand:SF 3 "register_operand" "f")))]
"TARGET_PA_20 && ! TARGET_SOFT_FLOAT"
- "fmpynfadd,sgl %2,%3,%1,%0"
+ "fmpynfadd,sgl %1,%2,%3,%0"
[(set_attr "type" "fpmulsgl")
(set_attr "length" "4")])
@@ -6168,72 +6148,9 @@
[(set_attr "type" "fpalu")
(set_attr "length" "4")])
-;; Generating a fused multiply sequence is a win for this case as it will
-;; reduce the latency for the fused case without impacting the plain
-;; multiply case.
-;;
-;; Similar possibilities exist for fnegabs, shadd and other insns which
-;; perform two operations with the result of the first feeding the second.
-(define_insn ""
- [(set (match_operand:DF 0 "register_operand" "=f")
- (plus:DF (mult:DF (match_operand:DF 1 "register_operand" "f")
- (match_operand:DF 2 "register_operand" "f"))
- (match_operand:DF 3 "register_operand" "f")))
- (set (match_operand:DF 4 "register_operand" "=&f")
- (mult:DF (match_dup 1) (match_dup 2)))]
- "(! TARGET_SOFT_FLOAT && TARGET_PA_20
- && ! (reg_overlap_mentioned_p (operands[4], operands[1])
- || reg_overlap_mentioned_p (operands[4], operands[2])))"
- "#"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "8")])
-
-;; We want to split this up during scheduling since we want both insns
-;; to schedule independently.
-(define_split
- [(set (match_operand:DF 0 "register_operand" "")
- (plus:DF (mult:DF (match_operand:DF 1 "register_operand" "")
- (match_operand:DF 2 "register_operand" ""))
- (match_operand:DF 3 "register_operand" "")))
- (set (match_operand:DF 4 "register_operand" "")
- (mult:DF (match_dup 1) (match_dup 2)))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- [(set (match_dup 4) (mult:DF (match_dup 1) (match_dup 2)))
- (set (match_dup 0) (plus:DF (mult:DF (match_dup 1) (match_dup 2))
- (match_dup 3)))]
- "")
-
-(define_insn ""
- [(set (match_operand:SF 0 "register_operand" "=f")
- (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "f")
- (match_operand:SF 2 "register_operand" "f"))
- (match_operand:SF 3 "register_operand" "f")))
- (set (match_operand:SF 4 "register_operand" "=&f")
- (mult:SF (match_dup 1) (match_dup 2)))]
- "(! TARGET_SOFT_FLOAT && TARGET_PA_20
- && ! (reg_overlap_mentioned_p (operands[4], operands[1])
- || reg_overlap_mentioned_p (operands[4], operands[2])))"
- "#"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "8")])
-
-;; We want to split this up during scheduling since we want both insns
-;; to schedule independently.
-(define_split
- [(set (match_operand:SF 0 "register_operand" "")
- (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "")
- (match_operand:SF 2 "register_operand" ""))
- (match_operand:SF 3 "register_operand" "")))
- (set (match_operand:SF 4 "register_operand" "")
- (mult:SF (match_dup 1) (match_dup 2)))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- [(set (match_dup 4) (mult:SF (match_dup 1) (match_dup 2)))
- (set (match_dup 0) (plus:SF (mult:SF (match_dup 1) (match_dup 2))
- (match_dup 3)))]
- "")
-
;; Negating a multiply can be faked by adding zero in a fused multiply-add
;; instruction.
+;; ??? Only if we add -0.0 or can ignore the sign of zero.
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f")
(neg:DF (mult:DF (match_operand:DF 1 "register_operand" "f")
@@ -6300,135 +6217,6 @@
(set (match_dup 0) (neg:SF (mult:SF (match_dup 1) (match_dup 2))))]
"")
-;; Now fused multiplies with the result of the multiply negated.
-(define_insn ""
- [(set (match_operand:DF 0 "register_operand" "=f")
- (plus:DF (neg:DF (mult:DF (match_operand:DF 1 "register_operand" "f")
- (match_operand:DF 2 "register_operand" "f")))
- (match_operand:DF 3 "register_operand" "f")))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- "fmpynfadd,dbl %1,%2,%3,%0"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "4")])
-
-(define_insn ""
- [(set (match_operand:SF 0 "register_operand" "=f")
- (plus:SF (neg:SF (mult:SF (match_operand:SF 1 "register_operand" "f")
- (match_operand:SF 2 "register_operand" "f")))
- (match_operand:SF 3 "register_operand" "f")))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- "fmpynfadd,sgl %1,%2,%3,%0"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "4")])
-
-(define_insn ""
- [(set (match_operand:DF 0 "register_operand" "=f")
- (plus:DF (neg:DF (mult:DF (match_operand:DF 1 "register_operand" "f")
- (match_operand:DF 2 "register_operand" "f")))
- (match_operand:DF 3 "register_operand" "f")))
- (set (match_operand:DF 4 "register_operand" "=&f")
- (mult:DF (match_dup 1) (match_dup 2)))]
- "(! TARGET_SOFT_FLOAT && TARGET_PA_20
- && ! (reg_overlap_mentioned_p (operands[4], operands[1])
- || reg_overlap_mentioned_p (operands[4], operands[2])))"
- "#"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "8")])
-
-(define_split
- [(set (match_operand:DF 0 "register_operand" "")
- (plus:DF (neg:DF (mult:DF (match_operand:DF 1 "register_operand" "")
- (match_operand:DF 2 "register_operand" "")))
- (match_operand:DF 3 "register_operand" "")))
- (set (match_operand:DF 4 "register_operand" "")
- (mult:DF (match_dup 1) (match_dup 2)))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- [(set (match_dup 4) (mult:DF (match_dup 1) (match_dup 2)))
- (set (match_dup 0) (plus:DF (neg:DF (mult:DF (match_dup 1) (match_dup 2)))
- (match_dup 3)))]
- "")
-
-(define_insn ""
- [(set (match_operand:SF 0 "register_operand" "=f")
- (plus:SF (neg:SF (mult:SF (match_operand:SF 1 "register_operand" "f")
- (match_operand:SF 2 "register_operand" "f")))
- (match_operand:SF 3 "register_operand" "f")))
- (set (match_operand:SF 4 "register_operand" "=&f")
- (mult:SF (match_dup 1) (match_dup 2)))]
- "(! TARGET_SOFT_FLOAT && TARGET_PA_20
- && ! (reg_overlap_mentioned_p (operands[4], operands[1])
- || reg_overlap_mentioned_p (operands[4], operands[2])))"
- "#"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "8")])
-
-(define_split
- [(set (match_operand:SF 0 "register_operand" "")
- (plus:SF (neg:SF (mult:SF (match_operand:SF 1 "register_operand" "")
- (match_operand:SF 2 "register_operand" "")))
- (match_operand:SF 3 "register_operand" "")))
- (set (match_operand:SF 4 "register_operand" "")
- (mult:SF (match_dup 1) (match_dup 2)))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- [(set (match_dup 4) (mult:SF (match_dup 1) (match_dup 2)))
- (set (match_dup 0) (plus:SF (neg:SF (mult:SF (match_dup 1) (match_dup 2)))
- (match_dup 3)))]
- "")
-
-(define_insn ""
- [(set (match_operand:DF 0 "register_operand" "=f")
- (minus:DF (match_operand:DF 3 "register_operand" "f")
- (mult:DF (match_operand:DF 1 "register_operand" "f")
- (match_operand:DF 2 "register_operand" "f"))))
- (set (match_operand:DF 4 "register_operand" "=&f")
- (mult:DF (match_dup 1) (match_dup 2)))]
- "(! TARGET_SOFT_FLOAT && TARGET_PA_20
- && ! (reg_overlap_mentioned_p (operands[4], operands[1])
- || reg_overlap_mentioned_p (operands[4], operands[2])))"
- "#"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "8")])
-
-(define_split
- [(set (match_operand:DF 0 "register_operand" "")
- (minus:DF (match_operand:DF 3 "register_operand" "")
- (mult:DF (match_operand:DF 1 "register_operand" "")
- (match_operand:DF 2 "register_operand" ""))))
- (set (match_operand:DF 4 "register_operand" "")
- (mult:DF (match_dup 1) (match_dup 2)))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- [(set (match_dup 4) (mult:DF (match_dup 1) (match_dup 2)))
- (set (match_dup 0) (minus:DF (match_dup 3)
- (mult:DF (match_dup 1) (match_dup 2))))]
- "")
-
-(define_insn ""
- [(set (match_operand:SF 0 "register_operand" "=f")
- (minus:SF (match_operand:SF 3 "register_operand" "f")
- (mult:SF (match_operand:SF 1 "register_operand" "f")
- (match_operand:SF 2 "register_operand" "f"))))
- (set (match_operand:SF 4 "register_operand" "=&f")
- (mult:SF (match_dup 1) (match_dup 2)))]
- "(! TARGET_SOFT_FLOAT && TARGET_PA_20
- && ! (reg_overlap_mentioned_p (operands[4], operands[1])
- || reg_overlap_mentioned_p (operands[4], operands[2])))"
- "#"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "8")])
-
-(define_split
- [(set (match_operand:SF 0 "register_operand" "")
- (minus:SF (match_operand:SF 3 "register_operand" "")
- (mult:SF (match_operand:SF 1 "register_operand" "")
- (match_operand:SF 2 "register_operand" ""))))
- (set (match_operand:SF 4 "register_operand" "")
- (mult:SF (match_dup 1) (match_dup 2)))]
- "! TARGET_SOFT_FLOAT && TARGET_PA_20"
- [(set (match_dup 4) (mult:SF (match_dup 1) (match_dup 2)))
- (set (match_dup 0) (minus:SF (match_dup 3)
- (mult:SF (match_dup 1) (match_dup 2))))]
- "")
-
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f")
(neg:DF (abs:DF (match_operand:DF 1 "register_operand" "f"))))