From fceecc511d4918e2b27a0609f8885ec8aba8723d Mon Sep 17 00:00:00 2001
From: Andrew Carlotti <andrew.carlotti@arm.com>
Date: Thu, 26 Oct 2023 15:45:15 +0100
Subject: [PATCH] aarch64: Fix ls64 intrinsic availability
The availability of ls64 intrinsics and data types were determined
solely by the globally specified architecture features, which did not
reflect any changes specified in target pragmas or attributes.
This patch removes the initialisation-time guards for the intrinsics,
and replaces them with checks at use time. We also get better error
messages when ls64 is not available (matching the existing error
messages for SVE intrinsics).
The data512_t type is made always available; this is consistent with the
present behaviour for Neon fp16/bf16 types.
gcc/ChangeLog:
PR target/112108
* config/aarch64/aarch64-builtins.cc (handle_arm_acle_h): Remove
feature check at initialisation.
(aarch64_general_check_builtin_call): Check ls64 intrinsics.
* config/aarch64/arm_acle.h: (data512_t) Make always available.
gcc/testsuite/ChangeLog:
PR target/112108
* gcc.target/aarch64/acle/ls64_guard-1.c: New test.
* gcc.target/aarch64/acle/ls64_guard-2.c: New test.
* gcc.target/aarch64/acle/ls64_guard-3.c: New test.
* gcc.target/aarch64/acle/ls64_guard-4.c: New test.
---
gcc/config/aarch64/aarch64-builtins.cc | 10 ++++++++--
gcc/config/aarch64/arm_acle.h | 2 --
gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c | 9 +++++++++
gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c | 10 ++++++++++
gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c | 9 +++++++++
gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c | 10 ++++++++++
6 files changed, 46 insertions(+), 4 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c
diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
index 9c6d9ec7537e..eb878b933fe5 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -2062,8 +2062,7 @@ aarch64_init_data_intrinsics (void)
void
handle_arm_acle_h (void)
{
- if (TARGET_LS64)
- aarch64_init_ls64_builtins ();
+ aarch64_init_ls64_builtins ();
aarch64_init_tme_builtins ();
aarch64_init_memtag_builtins ();
}
@@ -2311,6 +2310,13 @@ aarch64_general_check_builtin_call (location_t location, vec<location_t>,
return aarch64_check_required_extensions (location, decl,
AARCH64_FL_TME);
+ case AARCH64_LS64_BUILTIN_LD64B:
+ case AARCH64_LS64_BUILTIN_ST64B:
+ case AARCH64_LS64_BUILTIN_ST64BV:
+ case AARCH64_LS64_BUILTIN_ST64BV0:
+ return aarch64_check_required_extensions (location, decl,
+ AARCH64_FL_LS64);
+
default:
break;
}
diff --git a/gcc/config/aarch64/arm_acle.h b/gcc/config/aarch64/arm_acle.h
index ab0432679130..ab4e7e60e046 100644
--- a/gcc/config/aarch64/arm_acle.h
+++ b/gcc/config/aarch64/arm_acle.h
@@ -265,9 +265,7 @@ __crc32d (uint32_t __a, uint64_t __b)
#define _TMFAILURE_INT 0x00800000u
#define _TMFAILURE_TRIVIAL 0x01000000u
-#ifdef __ARM_FEATURE_LS64
typedef __arm_data512_t data512_t;
-#endif
#pragma GCC push_options
#pragma GCC target ("+nothing+rng")
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c
new file mode 100644
index 000000000000..7dfc193a2934
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8.6-a" } */
+
+#include <arm_acle.h>
+
+data512_t foo (void * p)
+{
+ return __arm_ld64b (p); /* { dg-error {ACLE function '__arm_ld64b' requires ISA extension 'ls64'} } */
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c
new file mode 100644
index 000000000000..3ede05a81f02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8.6-a" } */
+
+#include <arm_acle.h>
+
+#pragma GCC target("arch=armv8-a+ls64")
+data512_t foo (void * p)
+{
+ return __arm_ld64b (p);
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c
new file mode 100644
index 000000000000..e0fccdad7bec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8-a+ls64 -mgeneral-regs-only" } */
+
+#include <arm_acle.h>
+
+data512_t foo (void * p)
+{
+ return __arm_ld64b (p);
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c
new file mode 100644
index 000000000000..af1d9a4241fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8-a+ls64" } */
+
+#include <arm_acle.h>
+
+#pragma GCC target("arch=armv8.6-a")
+data512_t foo (void * p)
+{
+ return __arm_ld64b (p); /* { dg-error {ACLE function '__arm_ld64b' requires ISA extension 'ls64'} } */
+}
--
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