From ff2a9d88b4748f1ccbf2e8e368fa499fa861c9c7 Mon Sep 17 00:00:00 2001
From: Richard Henderson <rth@redhat.com>
Date: Fri, 1 Feb 2013 08:34:28 -0800
Subject: [PATCH] alpha: widening multiply pattern
* config/alpha/alpha.md (umulditi3): New.
From-SVN: r195668
---
gcc/ChangeLog | 2 ++
gcc/config/alpha/alpha.md | 15 +++++++++++++++
2 files changed, 17 insertions(+)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dd9224dd9866..1c66228e1955 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -3,6 +3,8 @@
* config/rs6000/rs6000.md (smulditi3): New.
(umulditi3): New.
+ * config/alpha/alpha.md (umulditi3): New.
+
2013-02-01 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/xcoff.h (ASM_OUTPUT_ALIGNED_COMMON): Use floor_log2.
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index f7f9397b865f..439752780a0b 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -719,6 +719,21 @@
"umulh %1,%2,%0"
[(set_attr "type" "imul")
(set_attr "opsize" "udi")])
+
+(define_expand "umulditi3"
+ [(set (match_operand:TI 0 "register_operand")
+ (mult:TI
+ (zero_extend:TI (match_operand:DI 1 "reg_no_subreg_operand"))
+ (zero_extend:TI (match_operand:DI 2 "reg_no_subreg_operand"))))]
+ ""
+{
+ rtx l = gen_reg_rtx (DImode), h = gen_reg_rtx (DImode);
+ emit_insn (gen_muldi3 (l, operands[1], operands[2]));
+ emit_insn (gen_umuldi3_highpart (h, operands[1], operands[2]));
+ emit_move_insn (gen_lowpart (DImode, operands[0]), l);
+ emit_move_insn (gen_highpart (DImode, operands[0]), h);
+ DONE;
+})
;; The divide and remainder operations take their inputs from r24 and
;; r25, put their output in r27, and clobber r23 and r28 on all systems.
--
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