The exception defines in <fenv.h> do not match the exception bits
in the FPU status register on hppa-linux and hppa64-hpux11.11.  On
linux, they match the trap enable bits.  On 64-bit hpux, they match
the exception bits for IA64.  The IA64 bits are in a different
order and location than HPPA.  HP uses table look ups to reorder
the bits in code to test and raise exceptions.

All the architectures that I looked at just pass the FPU status
register to __atomic_feraiseexcept().  The simplest approach for
hppa is to define FE_INEXACT, etc, to match the status register
and not include <fenv.h>..

2024-02-03  John David Anglin  <danglin@gcc.gnu.org>

libatomic/ChangeLog:

	PR target/59778
	* configure.tgt (hppa*): Set ARCH.
	* config/pa/fenv.c: New file.