RISC-V: Add testcases for unsigned vector .SAT_TRUNC form 2

This patch would like to add test cases for the unsigned vector
.SAT_TRUNC form 2.  Aka:

Form 2:
  #define DEF_VEC_SAT_U_TRUNC_FMT_2(NT, WT)                             \
  void __attribute__((noinline))                                        \
  vec_sat_u_trunc_##NT##_##WT##_fmt_2 (NT *out, WT *in, unsigned limit) \
  {                                                                     \
    unsigned i;                                                         \
    for (i = 0; i < limit; i++)                                         \
      {                                                                 \
        WT max = (WT)(NT)-1;                                            \
        out[i] = in[i] > max ? (NT)max : (NT)in[i];                     \
      }                                                                 \
  }

DEF_VEC_SAT_U_TRUNC_FMT_2 (uint32_t, uint64_t)

The below test is passed for this patch.
* The rv64gcv regression test.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-10.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-11.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-12.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-7.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-8.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-9.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-10.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-11.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-12.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-7.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-8.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-9.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>