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AArch64: Add support for SIMD xor immediate (3/3)
Add support for SVE xor immediate when generating AdvSIMD code and SVE is available. gcc/ChangeLog: * config/aarch64/aarch64.cc (enum simd_immediate_check): Add AARCH64_CHECK_XOR. (aarch64_simd_valid_xor_imm): New function. (aarch64_output_simd_imm): Add AARCH64_CHECK_XOR support. (aarch64_output_simd_xor_imm): New function. * config/aarch64/aarch64-protos.h (aarch64_output_simd_xor_imm): New prototype. (aarch64_simd_valid_xor_imm): New prototype. * config/aarch64/aarch64-simd.md (xor<mode>3<vczle><vczbe>): Use aarch64_reg_or_xor_imm predicate and add an immediate alternative. * config/aarch64/predicates.md (aarch64_reg_or_xor_imm): Add new predicate. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/simd_imm.c: New test.
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- gcc/config/aarch64/aarch64-protos.h 2 additions, 0 deletionsgcc/config/aarch64/aarch64-protos.h
- gcc/config/aarch64/aarch64-simd.md 8 additions, 4 deletionsgcc/config/aarch64/aarch64-simd.md
- gcc/config/aarch64/aarch64.cc 20 additions, 2 deletionsgcc/config/aarch64/aarch64.cc
- gcc/config/aarch64/predicates.md 5 additions, 0 deletionsgcc/config/aarch64/predicates.md
- gcc/testsuite/gcc.target/aarch64/sve/simd_imm.c 35 additions, 0 deletionsgcc/testsuite/gcc.target/aarch64/sve/simd_imm.c
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