RISC-V: Support RVV VFNMSAC rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFNMSAC for the below samples.
* __riscv_vfnmsac_vv_f32m1_rm
* __riscv_vfnmsac_vv_f32m1_rm_m
* __riscv_vfnmsac_vf_f32m1_rm
* __riscv_vfnmsac_vf_f32m1_rm_m
Signed-off-by:
Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(class vfnmsac_frm): New class for vfnmsac frm.
(vfnmsac_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfnmsac_frm): New function definition.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-single-negate-multiply-sub.c:
New test.
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- gcc/config/riscv/riscv-vector-builtins-bases.cc 24 additions, 0 deletionsgcc/config/riscv/riscv-vector-builtins-bases.cc
- gcc/config/riscv/riscv-vector-builtins-bases.h 1 addition, 0 deletionsgcc/config/riscv/riscv-vector-builtins-bases.h
- gcc/config/riscv/riscv-vector-builtins-functions.def 2 additions, 0 deletionsgcc/config/riscv/riscv-vector-builtins-functions.def
- gcc/testsuite/gcc.target/riscv/rvv/base/float-point-single-negate-multiply-sub.c 47 additions, 0 deletions...t/riscv/rvv/base/float-point-single-negate-multiply-sub.c
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