arm,testsuite: Add -mtune=cortex-m55 to dlstp-compile-asm-1.c test.

This test would fail if GCC is configured with non-default options,
such as -mtune=cortex-a9.

This 'unexpected' scheduling makes the DLSTP optimization generate
	subs    lr, #16
	bhi	.L4
	lctp
	pop     {r4, r5, pc}
.L4:
	sub     ip, ip, #16
	b      <loop-begin>

instead of the expected
sub     ip, ip, #16
letp lr, <loop-begin>

Although GCC still optimizes all 144 loops, only 96 use letp, 48
others use lctp.

The patch simply forces -mtune=cortex-m55 to avoid this unexpected
issue.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/dlstp-compile-asm-1.c: Add -mtune=cortex-m55