match.pd: Fix ICE on BIT_INSERT_EXPR of BIT_FIELD_REF folding [PR113967]

The following testcase ICEs, because BIT_FIELD_REF's position is not
multiple of the vector element's bit size and the code uses exact_div
to divide those 2 values.

For BIT_INSERT_EXPR, the tree-cfg.cc verification verifies the position
is a multiple of the inserted bit size when inserting into vectors,
but for BIT_FIELD_REF the position can be arbitrary if within the range.

The following patch fixes that.

2024-02-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113967
	* match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): Require
	in condition that @rpos is multiple of vector element size.

	* gcc.dg/pr113967.c: New test.