Skip to content
Snippets Groups Projects
Commit 3f1a08d9 authored by liuhongt's avatar liuhongt
Browse files

For 128/256-bit vec_cond_expr, When mask operands is lt reg const0_rtx, blendv...

For 128/256-bit vec_cond_expr, When mask operands is lt reg const0_rtx, blendv can be used instead of avx512 mask.

gcc/ChangeLog:

	PR target/100648
	* config/i386/sse.md (*avx_cmp<mode>3_lt): New
	define_insn_and_split.
	(*avx_cmp<mode>3_ltint): Ditto.
	(*avx2_pcmp<mode>3_3): Ditto.
	(*avx2_pcmp<mode>3_4): Ditto.
	(*avx2_pcmp<mode>3_5): Ditto.

gcc/testsuite/ChangeLog:

	PR target/100648
	* g++.target/i386/avx2-pr54700-2.C: Adjust testcase.
	* g++.target/i386/avx512vl-pr54700-1a.C: New test.
	* g++.target/i386/avx512vl-pr54700-1b.C: New test.
	* g++.target/i386/avx512vl-pr54700-2a.C: New test.
	* g++.target/i386/avx512vl-pr54700-2b.C: New test.
	* gcc.target/i386/avx512vl-pr100648.c: New test.
	* gcc.target/i386/avx512vl-blendv-1.c: New test.
	* gcc.target/i386/avx512vl-blendv-2.c: New test.
parent 28560c6d
No related merge requests found
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment