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Commit 401dc181 authored by Pan Li's avatar Pan Li
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RISC-V: Fix RVV dynamic frm tests failure


The hancement of mode-switching performs some optimization when
emit the frm backup insn, some redudant fsrm insns are removed
for the following test cases.

This patch would like to adjust the asm check for above optimization.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-54.c: Adjust
	the asm checker.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-57.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-58.c: Ditto.

Signed-off-by: default avatarPan Li <pan2.li@intel.com>
parent 5dfa501d
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