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Unverified Commit 42738604 authored by Xi Ruoyao's avatar Xi Ruoyao
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LoongArch: Use normal RTL pattern instead of UNSPEC for {x,}vsr{a,l}ri instructions

Allowing (t + (1ul << imm >> 1)) >> imm to be recognized as a rounding
shift operation.

gcc/ChangeLog:

	* config/loongarch/lasx.md (UNSPEC_LASX_XVSRARI): Remove.
	(UNSPEC_LASX_XVSRLRI): Remove.
	(lasx_xvsrari_<lsxfmt>): Remove.
	(lasx_xvsrlri_<lsxfmt>): Remove.
	* config/loongarch/lsx.md (UNSPEC_LSX_VSRARI): Remove.
	(UNSPEC_LSX_VSRLRI): Remove.
	(lsx_vsrari_<lsxfmt>): Remove.
	(lsx_vsrlri_<lsxfmt>): Remove.
	* config/loongarch/simd.md (simd_<optab>_imm_round_<mode>): New
	define_insn.
	(<simd_isa>_<x>v<insn>ri_<simdfmt>): New define_expand.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/vect-shift-imm-round.c: New test.
parent cef5f23a
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