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Commit 46ca31d6 authored by Uros Bizjak's avatar Uros Bizjak
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i386: Implement 4-byte vector support [PR100637]

Add infrastructure, logic and arithmetic support for 4-byte vectors.
These can be used with SSE2 targets, where movd instructions from/to
XMM registers are available.  x86_64 ABI passes 4-byte vectors in
integer registers, so also add logic operations with integer registers.

2021-05-18  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
	PR target/100637
	* config/i386/i386.h (VALID_SSE2_REG_MODE):
	Add V4QI and V2HI modes.
	(VALID_INT_MODE_P): Ditto.
	* config/i386/mmx.md (VI_32): New mode iterator.
	(mmxvecsize): Handle V4QI and V2HI.
	(Yv_Yw): Ditto.
	(mov<VI_32:mode>): New expander.
	(*mov<mode>_internal): New insn pattern.
	(movmisalign<VI_32:mode>): New expander.
	(neg<VI_32:mode>): New expander.
	(<plusminus:insn><VI_32:mode>3): New expander.
	(*<plusminus:insn><VI_32:mode>3): New insn pattern.
	(mulv2hi3): New expander.
	(*mulv2hi3): New insn pattern.
	(one_cmpl<VI_32:mode>2): New expander.
	(*andnot<VI_32:mode>3): New insn pattern.
	(<any_logic:code><VI_32:mode>3): New expander.
	(*<any_logic:code><VI_32:mode>3): New insn pattern.

gcc/testsuite/

	PR target/100637
	* gcc.target/i386/pr100637-1b.c: New test.
	* gcc.target/i386/pr100637-1w.c: Ditto.

	* gcc.target/i386/pr92658-avx2-2.c: Do not XFAIL scan for pmovsxbq.
	* gcc.target/i386/pr92658-avx2.c: Do not XFAIL scan for pmovzxbq.
	* gcc.target/i386/pr92658-avx512vl.c: Do not XFAIL scan for vpmovdb.
	* gcc.target/i386/pr92658-sse4-2.c: Do not XFAIL scan for
	pmovsxbd and pmovsxwq.
	* gcc.target/i386/pr92658-sse4.c: Do not XFAIL scan for
	pmovzxbd and pmovzxwq.
parent 7d3711a5
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