[PATCH v2 2/2] RISC-V: Add Tenstorrent Ascalon 8 wide architecture
This adds the Tenstorrent Ascalon 8 wide architecture (tt-ascalon-d8) to the list of known cores. gcc/ChangeLog: * config/riscv/riscv-cores.def: Add tt-ascalon-d8. * config/riscv/riscv.cc (tt_ascalon_d8_tune_info): New. * doc/invoke.texi (RISC-V): Add tt-ascalon-d8 to -mcpu. gcc/testsuite/ChangeLog: * gcc.target/riscv/mcpu-tt-ascalon-d8.c: New test.
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- gcc/config/riscv/riscv-cores.def 8 additions, 0 deletionsgcc/config/riscv/riscv-cores.def
- gcc/config/riscv/riscv.cc 22 additions, 0 deletionsgcc/config/riscv/riscv.cc
- gcc/doc/invoke.texi 2 additions, 1 deletiongcc/doc/invoke.texi
- gcc/testsuite/gcc.target/riscv/mcpu-tt-ascalon-d8.c 76 additions, 0 deletionsgcc/testsuite/gcc.target/riscv/mcpu-tt-ascalon-d8.c
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