RISC-V: Support VLS unary floating-point patterns
Extend current VLA patterns with VLS modes. Regression all passed. gcc/ChangeLog: * config/riscv/autovec.md: Extend VLS modes. * config/riscv/vector.md: Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: Add unary test. * gcc.target/riscv/rvv/autovec/vls/neg-2.c: New test.
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- gcc/config/riscv/autovec.md 6 additions, 6 deletionsgcc/config/riscv/autovec.md
- gcc/config/riscv/vector.md 10 additions, 10 deletionsgcc/config/riscv/vector.md
- gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h 2 additions, 1 deletiongcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h
- gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-2.c 52 additions, 0 deletionsgcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-2.c
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