RISC-V: Allow const0_rtx operand in max/min

Optimize cases that use max[u]/min[u] against a zero constant.

E.g., the case int f(int x) { return x >= 0 ? x : 0; }
the current asm output in rv64gc_zba_zbb

 li rtmp,0
 max a0,a0,rtmp

could be optimized into

 max a0,a0,zero

gcc/ChangeLog:
	* config/riscv/bitmanip.md: allow 0 constant in max/min
	pattern.

gcc/testsuite/ChangeLog:
	* gcc.target/riscv/zbb-min-max-03.c: New test.

gcc/config/riscv/bitmanip.md

@@ -363,9 +363,9 @@
 (define_insn "<bitmanip_optab><mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_minmax:X (match_operand:X 1 "register_operand" "r")
-			   (match_operand:X 2 "register_operand" "r")))]
+			   (match_operand:X 2 "reg_or_0_operand" "rJ")))]
   "TARGET_ZBB"
-  "<bitmanip_insn>\t%0,%1,%2"
+  "<bitmanip_insn>\t%0,%1,%z2"
   [(set_attr "type" "bitmanip")])
 
 ;; Optimize the common case of a SImode min/max against a constant

gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c

+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zba_zbb -mabi=lp64d" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" } } */
+
+int f(int x) {
+ return x >= 0 ? x : 0;
+}
+
+/* { dg-final { scan-assembler-times "max\t" 1 } } */
+/* { dg-final { scan-assembler-not "li\t" } } */