-
- Downloads
i386: Don't optimize vshuf{i,f}{32x4,64x2} and vperm{i,f}128 to vblendps for %ymm16+ [PR112435]
The vblendps instruction is only VEX encoded, not EVEX, so can't be used if there are %ymm16+ or EGPR registers involved. 2023-11-14 Jakub Jelinek <jakub@redhat.com> Hu, Lin1 <lin1.hu@intel.com> PR target/112435 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>, <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add alternative with just x instead of v constraints and xjm instead of vm and use vblendps as optimization only with that alternative. * gcc.target/i386/avx512vl-pr112435-1.c: New test. * gcc.target/i386/avx512vl-pr112435-2.c: New test. * gcc.target/i386/avx512vl-pr112435-3.c: New test.
Showing
- gcc/config/i386/sse.md 8 additions, 8 deletionsgcc/config/i386/sse.md
- gcc/testsuite/gcc.target/i386/avx512vl-pr112435-1.c 13 additions, 0 deletionsgcc/testsuite/gcc.target/i386/avx512vl-pr112435-1.c
- gcc/testsuite/gcc.target/i386/avx512vl-pr112435-2.c 63 additions, 0 deletionsgcc/testsuite/gcc.target/i386/avx512vl-pr112435-2.c
- gcc/testsuite/gcc.target/i386/avx512vl-pr112435-3.c 78 additions, 0 deletionsgcc/testsuite/gcc.target/i386/avx512vl-pr112435-3.c
Loading
Please register or sign in to comment