aarch64, testsuite: Fix up pr71727.c

The test is trying to check that we don't use q-register stores with
-mstrict-align, so actually check specifically for that.

This is a prerequisite to avoid regressing:

scan-assembler-not "add\tx0, x0, :"

with the upcoming ldp fusion pass, as we change where the ldps are
formed such that a register is used rather than a symbolic (lo_sum)
address for the first load.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/pr71727.c: Adjust scan-assembler-not to
	make sure we don't have q-register stores with -mstrict-align.