GCN: Conditionalize 'define_expand "reduc_<fexpander>_scal_<mode>"' on...

GCN: Conditionalize 'define_expand "reduc_<fexpander>_scal_<mode>"' on '!TARGET_RDNA2_PLUS' [PR113615]

On top of commit c7ec7bd1
"amdgcn: add -march=gfx1030 EXPERIMENTAL" conditionalizing
'define_expand "reduc_<reduc_op>_scal_<mode>"' on
'!TARGET_RDNA2' (later: '!TARGET_RDNA2_PLUS'), we then did similar in
commit 7cc2262e
"gcn/gcn-valu.md: Disable fold_left_plus for TARGET_RDNA2_PLUS [PR113615]"
to conditionalize 'define_expand "fold_left_plus_<mode>"' on
'!TARGET_RDNA2_PLUS', but I found we also need to conditionalize the related
'define_expand "reduc_<fexpander>_scal_<mode>"' on '!TARGET_RDNA2_PLUS', to
avoid ICEs like:

    [...]/gcc.dg/vect/pr108608.c: In function 'foo':
    [...]/gcc.dg/vect/pr108608.c:9:1: error: unrecognizable insn:
    (insn 34 33 35 2 (set (reg:V64DF 723)
            (unspec:V64DF [
                    (reg:V64DF 690 [ vect_m_11.20 ])
                    (const_int 1 [0x1])
                ] UNSPEC_MOV_DPP_SHR)) -1
         (nil))
    during RTL pass: vregs

Similar for 'gcc.dg/vect/vect-fmax-2.c', 'gcc.dg/vect/vect-fmin-2.c', and
'UNSPEC_SMAX_DPP_SHR' for 'gcc.dg/vect/vect-fmax-1.c', and
'UNSPEC_SMIN_DPP_SHR' for 'gcc.dg/vect/vect-fmin-1.c', when running 'vect.exp'
for 'check-gcc-c'.

	PR target/113615
	gcc/
	* config/gcn/gcn-valu.md (define_expand "reduc_<fexpander>_scal_<mode>"):
	Conditionalize on '!TARGET_RDNA2_PLUS'.
	* config/gcn/gcn.cc (gcn_expand_dpp_shr_insn)
	(gcn_expand_reduc_scalar):
	'gcc_checking_assert (!TARGET_RDNA2_PLUS);'.