RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS]

This patch fixes a bug of VSETVL PASS in this following situation:

    Ignore curr info since prev info available with it:
      prev_info: VALID (insn 8, bb 2)
        Demand fields: demand_ratio_and_ge_sew demand_avl
        SEW=16, VLMUL=mf4, RATIO=64, MAX_SEW=64
        TAIL_POLICY=agnostic, MASK_POLICY=agnostic
        AVL=(const_int 1 [0x1])
        VL=(nil)
      curr_info: VALID (insn 12, bb 2)
        Demand fields: demand_ge_sew demand_non_zero_avl
        SEW=16, VLMUL=m1, RATIO=16, MAX_SEW=32
        TAIL_POLICY=agnostic, MASK_POLICY=agnostic
        AVL=(const_int 1 [0x1])
        VL=(nil)

We should update prev_info MAX_SEW from 64 into 32.

Before this patch:
foo:
        vsetivli        zero,1,e64,m1,ta,ma
        vle64.v v1,0(a1)
        vmv.s.x v3,a0
        vfmv.s.f        v2,fa0
        vadd.vv v1,v1,v1
        ret

After this patch:
foo:
	vsetivli	zero,1,e16,mf4,ta,ma
	vle64.v	v1,0(a1)
	vmv.s.x	v3,a0
	vfmv.s.f	v2,fa0
	vsetvli	zero,zero,e64,m1,ta,ma
	vadd.vv	v1,v1,v1
	ret

Tested on both RV32 and RV64 no regression. Committed.

	PR target/113248

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info):
	Update the MAX_SEW.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/pr113248.c: New test.