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arm: Auto-vectorization for MVE: vshl
This patch enables MVE vshlq instructions for auto-vectorization. The existing mve_vshlq_n_<supf><mode> is kept, as it takes a single immediate as second operand, and is used by arm_mve.h. We move the vashl<mode>3 insn from neon.md to an expander in vec-common.md, and the mve_vshlq_<supf><mode> insn from mve.md to vec-common.md, adding the second alternative fron neon.md. mve_vshlq_<supf><mode> will be used by a later patch enabling vectorization for vshr, as a unified version of ashl3<mode3>_[signed|unsigned] from neon.md. Keeping the use of unspec VSHLQ enables to generate both 's' and 'u' variants. It is not clear whether the neon_shift_[reg|imm]<q> attribute is still suitable, since this insn is also used for MVE. I kept the mve_vshlq_<supf><mode> naming instead of renaming it to ashl3_<supf>_<mode> as discussed because the reference in arm_mve_builtins.def automatically inserts the "mve_" prefix and I didn't want to make a special case for this. I haven't yet found why the v16qi and v8hi tests are not vectorized. With dest[i] = a[i] << b[i] and: { int i; unsigned int i.24_1; unsigned int _2; int16_t * _3; short int _4; int _5; int16_t * _6; short int _7; int _8; int _9; int16_t * _10; short int _11; unsigned int ivtmp_42; unsigned int ivtmp_43; <bb 2> [local count: 119292720]: <bb 3> [local count: 954449105]: i.24_1 = (unsigned int) i_23; _2 = i.24_1 * 2; _3 = a_15(D) + _2; _4 = *_3; _5 = (int) _4; _6 = b_16(D) + _2; _7 = *_6; _8 = (int) _7; _9 = _5 << _8; _10 = dest_17(D) + _2; _11 = (short int) _9; *_10 = _11; i_19 = i_23 + 1; ivtmp_42 = ivtmp_43 - 1; if (ivtmp_42 != 0) goto <bb 5>; [87.50%] else goto <bb 4>; [12.50%] <bb 5> [local count: 835156386]: goto <bb 3>; [100.00%] <bb 4> [local count: 119292720]: return; } the vectorizer says: mve-vshl.c:37:96: note: ==> examining statement: _5 = (int) _4; mve-vshl.c:37:96: note: vect_is_simple_use: operand *_3, type of def: internal mve-vshl.c:37:96: note: vect_is_simple_use: vectype vector(8) short int mve-vshl.c:37:96: missed: conversion not supported by target. mve-vshl.c:37:96: note: vect_is_simple_use: operand *_3, type of def: internal mve-vshl.c:37:96: note: vect_is_simple_use: vectype vector(8) short int mve-vshl.c:37:96: note: vect_is_simple_use: operand *_3, type of def: internal mve-vshl.c:37:96: note: vect_is_simple_use: vectype vector(8) short int mve-vshl.c:37:117: missed: not vectorized: relevant stmt not supported: _5 = (int) _4; mve-vshl.c:37:96: missed: bad operation or unsupported loop bound. mve-vshl.c:37:96: note: ***** Analysis failed with vector mode V8HI 2020-12-03 Christophe Lyon <christophe.lyon@linaro.org> gcc/ * config/arm/mve.md (mve_vshlq_<supf><mode>): Move to vec-commond.md. * config/arm/neon.md (vashl<mode>3): Delete. * config/arm/vec-common.md (mve_vshlq_<supf><mode>): New. (vasl<mode>3): New expander. gcc/testsuite/ * gcc.target/arm/simd/mve-vshl.c: Add tests for vshl.
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- gcc/config/arm/mve.md 1 addition, 12 deletionsgcc/config/arm/mve.md
- gcc/config/arm/neon.md 0 additions, 19 deletionsgcc/config/arm/neon.md
- gcc/config/arm/vec-common.md 22 additions, 0 deletionsgcc/config/arm/vec-common.md
- gcc/testsuite/gcc.target/arm/simd/mve-vshl.c 62 additions, 0 deletionsgcc/testsuite/gcc.target/arm/simd/mve-vshl.c
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