Adjust gcc.dg/vect/slp-12a.c

We can now SLP the loop.  There's PR116583 tracking that this still
fails for VLA vectors when load-lanes doesn't support a group of
size 8.  We can't express this right now so the testcase keeps
FAILing for aarch64 with SVE (but passes now for riscv).

	* gcc.dg/vect/slp-12a.c: Adjust.