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RISC-V: Fix double mode under RV32 not utilize vf
Currently, some binops of vector vs double scalar under RV32 can't translated to vf but vfmv+vxx.vv. The cause is that vec_duplicate is also expanded to broadcast for double mode under RV32. last-combine can't process expanded broadcast. gcc/ChangeLog: * config/riscv/vector.md: Add !FLOAT_MODE_P constraint. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c: Fix test. * gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv-nofm.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv-nofm.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fadd-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fadd-2.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fadd-3.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fadd-4.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-3.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-4.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-5.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-6.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmax-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmax-2.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmax-3.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmax-4.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmin-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmin-2.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmin-3.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmin-4.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-3.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-4.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-5.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-6.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmul-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmul-2.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmul-3.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmul-4.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_fmul-5.c: Ditto.
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- gcc/config/riscv/vector.md 2 additions, 1 deletiongcc/config/riscv/vector.md
- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c 2 additions, 2 deletions...te/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv-nofm.c 2 additions, 2 deletions...te/gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv-nofm.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv-nofm.c 2 additions, 2 deletions...te/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv-nofm.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c 3 additions, 3 deletions...te/gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c 4 additions, 4 deletions...gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-1.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-1.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-2.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-2.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-3.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-3.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-4.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fadd-4.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-1.c 2 additions, 2 deletions...suite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-1.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-3.c 2 additions, 2 deletions...suite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-3.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-4.c 2 additions, 2 deletions...suite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-4.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-5.c 2 additions, 2 deletions...suite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-5.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-6.c 2 additions, 2 deletions...suite/gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-6.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-1.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-1.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-2.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-2.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-3.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-3.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-4.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmax-4.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmin-1.c 2 additions, 2 deletions...testsuite/gcc.target/riscv/rvv/autovec/cond/cond_fmin-1.c
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