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Commit 923a67f1 authored by Juzhe-Zhong's avatar Juzhe-Zhong Committed by Lehua Ding
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RISC-V: Fix VSETVL PASS regression

This patch fix 2 regression (one is bug regression, the other is performance regression).
Those 2 regressions are both we are comparing ratio for same AVL in wrong place.

1. BUG regression:
avl_single-84.c:

f0:
        li      a5,999424
        add     a1,a1,a5
        li      a4,299008
        add     a5,a0,a5
        addi    a3,a4,992
        addi    a5,a5,576
        addi    a1,a1,576
        vsetvli a4,zero,e8,m2,ta,ma
        add     a0,a0,a3
        vlm.v   v1,0(a5)
        vsm.v   v1,0(a1)
        vl1re64.v       v1,0(a0)
        beq     a2,zero,.L10
        li      a5,0
        vsetvli zero,zero,e64,m1,tu,ma   --->  This is totally incorrect since the ratio above is 4, wheras it is demanding ratio = 64 here.
.L3:
        fcvt.d.lu       fa5,a5
        addi    a5,a5,1
        fadd.d  fa5,fa5,fa0
        vfmv.s.f        v1,fa5
        bne     a5,a2,.L3
        vfmv.f.s        fa0,v1
        ret
.L10:
        vsetvli zero,zero,e64,m1,ta,ma
        vfmv.f.s        fa0,v1
        ret

2. Performance regression:

before this patch:

        vsetvli a5,a4,e8,m1,ta,ma
        vsetvli zero,a5,e32,m1,tu,ma
        vmv.s.x v2,zero
        vmv.s.x v1,zero
        vsetvli zero,a5,e32,m4,tu,ma
        vle32.v v4,0(a1)
        vfmul.vv        v4,v4,v4
        vfredosum.vs    v1,v4,v2
        vfmv.f.s        fa5,v1
        fsw     fa5,0(a0)
        sub     a4,a4,a5
        bne     a4,zero,.L2
        ret

After this patch:

	vsetvli	a5,a4,e32,m4,tu,ma
	vle32.v	v4,0(a1)
	vmv.s.x	v2,zero
	vmv.s.x	v1,zero
	vfmul.vv	v4,v4,v4
	vfredosum.vs	v1,v4,v2
	vfmv.f.s	fa5,v1
	fsw	fa5,0(a0)
	sub	a4,a4,a5
	bne	a4,zero,.L2
	ret

Tested rv64gcv_zvfh_zfh passed no regression.

zvl256b/zvl512b/zvl1024b/zve64d is runing.

	PR target/112776

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::pre_global_vsetvl_info): Fix ratio.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Adapt test.
	* gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/pr112776.c: New test.
parent 73e2bdbf
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