RISC-V: Support RVV VFSQRT rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFSQRT as the below samples.

* __riscv_vfsqrt_v_f32m1_rm
* __riscv_vfsqrt_v_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(class unop_frm): New class for frm.
	(vfsqrt_frm_obj): New declaration.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfsqrt_frm): New intrinsic function definition.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-sqrt.c: New test.