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LoongArch: Allow moving TImode vectors
We have some vector instructions for operations on 128-bit integer, i.e. TImode, vectors. Previously they had been modeled with unspecs, but it's more natural to just model them with TImode vector RTL expressions. For the preparation, allow moving V1TImode and V2TImode vectors in LSX and LASX registers so we won't get a reload failure when we start to save TImode vectors in these registers. This implicitly depends on the vrepli optimization: without it we'd try "vrepli.q" which does not really exist and trigger an ICE. gcc/ChangeLog: * config/loongarch/lsx.md (mov<LSX:mode>): Remove. (movmisalign<LSX:mode>): Remove. (mov<LSX:mode>_lsx): Remove. * config/loongarch/lasx.md (mov<LASX:mode>): Remove. (movmisalign<LASX:mode>): Remove. (mov<LASX:mode>_lasx): Remove. * config/loongarch/loongarch-modes.def (V1TI): Add. (V2TI): Mention in the comment. * config/loongarch/loongarch.md (mode): Add V1TI and V2TI. * config/loongarch/simd.md (ALLVEC_TI): New mode iterator. (mov<ALLVEC_TI:mode): New define_expand. (movmisalign<ALLVEC_TI:mode>): Likewise. (mov<ALLVEC_TI:mode>_simd): New define_insn_and_split.
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- gcc/config/loongarch/lasx.md 0 additions, 40 deletionsgcc/config/loongarch/lasx.md
- gcc/config/loongarch/loongarch-modes.def 2 additions, 1 deletiongcc/config/loongarch/loongarch-modes.def
- gcc/config/loongarch/loongarch.md 1 addition, 1 deletiongcc/config/loongarch/loongarch.md
- gcc/config/loongarch/lsx.md 0 additions, 36 deletionsgcc/config/loongarch/lsx.md
- gcc/config/loongarch/simd.md 42 additions, 0 deletionsgcc/config/loongarch/simd.md
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