RISC-V: Target support for z*inx extension.

Support 'TARGET_ZFINX' with float instruction pattern and builtin function.
Reuse 'TARGET_HADR_FLOAT',  'TARGET_DOUBLE_FLOAT' and 'TARGET_ZHINX' patterns.

gcc/ChangeLog:

	* config/riscv/iterators.md (TARGET_ZFINX):New target.
	(TARGET_ZDINX): Ditto.
	(TARGET_ZHINX): Ditto.
	* config/riscv/riscv-builtins.cc (AVAIL): Ditto.
	(riscv_atomic_assign_expand_fenv): Ditto.
	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Ditto.
	* config/riscv/riscv.md: Ditto.