AVR: Add an RTL peephole to tweak lower_reg:QI o= cst.

For operations like  X o= CST, regalloc may spill l-reg X to a d-reg:
   D =  X
   D o= CST
   X =  D
where it is better to instead
   D =  CST
   X o= D
This patch adds an according RTL peephole.

gcc/
	* config/avr/avr.md: Add a peephole2 that improves bit operations
	with a lower register and a constant.