IBM Z: vec_store_len_r/vec_load_len_r fix

This fixes a problem with the vec_store_len_r intrinsic.  The macros
mapping the intrinsic to a GCC builtin had the wrong signature.

With the patch an immediate length operand of vlrl/vstrl is handled
the same way as if it was passed in a register to vlrlr/vstrlr.
Values bigger than 15 always load the full vector.  If it can be
recognized that it is in effect a full vector register load or store
it is now implemented with vl/vst instead.

gcc/ChangeLog:

2020-04-30  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/constraints.md ("j>f", "jb4"): New constraints.
	* config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
	macro definitions.
	* config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
	separate expander.
	("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
	Change constraint for vlrl/vstrl to jb4.

gcc/testsuite/ChangeLog:

2020-04-30  Andreas Krebbel  <krebbel@linux.ibm.com>

	* gcc.target/s390/zvector/vec_load_len_r.c: New test.
	* gcc.target/s390/zvector/vec_store_len_r.c: New test.