RISC-V: Fix asm checks regression due to recent middle-end change
The recent middle-end change result in some asm check failures.
This patch would like to fix the asm check by adjust the times.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls/shift-1.c: Fix asm check
count.
* gcc.target/riscv/rvv/autovec/vls/shift-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/shift-3.c: Ditto.
Signed-off-by:
Pan Li <pan2.li@intel.com>
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- gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-1.c 1 addition, 1 deletiongcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-1.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-2.c 1 addition, 1 deletiongcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-2.c
- gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-3.c 1 addition, 1 deletiongcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-3.c
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