RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

Base on V1 patch, adding comment:
;; Use define_insn_and_split to define vsext.vf2/vzext.vf2 will help combine PASS
;; to combine instructions as below:
;;   vsext.vf2 + vsext.vf2 + vadd.vv ==> vwadd.vv

gcc/ChangeLog:

	* config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
	expand into define_insn_and_split.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/rvv.exp:
	* gcc.target/riscv/rvv/autovec/widen/widen-1.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen-2.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen-3.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen-4.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-1.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-2.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-3.c: New test.
	* gcc.target/riscv/rvv/autovec/widen/widen_run-4.c: New test.