RISC-V: Fix incorrect index(offset) of gather/scatter

I suddenly discovered I made a mistake that was lucky un-exposed.

https://godbolt.org/z/c3jzrh7or

GCC is using 32 bit index offset:

        vsll.vi v1,v1,2
        vsetvli zero,a5,e32,m1,ta,ma
        vluxei32.v      v1,(a1),v1

This is wrong since v1 may overflow 32bit after vsll.vi.

After this patch:

vsext.vf2	v8,v4
vsll.vi	v8,v8,2
vluxei64.v	v8,(a1),v8

Same as Clang.

Regression passed. Ok for trunk ?

gcc/ChangeLog:

	* config/riscv/autovec.md: Fix index bug.
	* config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
	* config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
	(gather_scatter_valid_offset_mode_p): New function.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/gather-scatter/offset_extend-1.c: New test.